diff --git a/LICENSE-THIRD-PARTY b/LICENSE-THIRD-PARTY index 622686947..981da1f53 100644 --- a/LICENSE-THIRD-PARTY +++ b/LICENSE-THIRD-PARTY @@ -17,7 +17,8 @@ RetDec uses the following third-party libraries or other resources: 9) whereami: https://github.com/gpakosz/whereami 10) yara: https://virustotal.github.io/yara/ 11) yaramod: https://github.com/avast/yaramod -12) cmake-modules: https://github.com/rpavlik/cmake-modules +12) Eigen: http://eigen.tuxfamily.org/index.php?title=Main_Page +13) cmake-modules: https://github.com/rpavlik/cmake-modules These third-party libraries or other resources are licensed under the following licenses: @@ -795,35 +796,3 @@ AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - -=============================================================================== -12) cmake-modules -=============================================================================== - -Copyright Iowa State University 2009-2014, or Copyright Sensics, Inc. 2014-2015, or Copyright Ryan A. Pavlik 2009-2015 - -Distributed under the Boost Software License, Version 1.0. - -Boost Software License - Version 1.0 - August 17th, 2003 - -Permission is hereby granted, free of charge, to any person or organization -obtaining a copy of the software and accompanying documentation covered by -this license (the "Software") to use, reproduce, display, distribute, -execute, and transmit the Software, and to prepare derivative works of the -Software, and to permit third-parties to whom the Software is furnished to -do so, all subject to the following: - -The copyright notices in the Software and this entire statement, including -the above license grant, this restriction and the following disclaimer, -must be included in all copies of the Software, in whole or in part, and -all derivative works of the Software, unless such copies or derivative -works are solely in the form of machine-executable object code generated by -a source language processor. - -THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT -SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE -FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, -ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER -DEALINGS IN THE SOFTWARE. diff --git a/cmake/deps.cmake b/cmake/deps.cmake index 7642a7f3b..71731b5e8 100644 --- a/cmake/deps.cmake +++ b/cmake/deps.cmake @@ -63,6 +63,14 @@ set(YARAMOD_ARCHIVE_SHA256 CACHE INTERNAL "" ) +set(EIGEN_URL + "https://gitlab.com/api/v4/projects/libeigen%2Feigen/repository/archive.zip?sha=0dd9643ad547d3dd2e23ded1d3376d0f7bdc8ada" + CACHE INTERNAL "URL of Eigen archive to use." +) +set(EIGEN_ARCHIVE_SHA256 + "f56e0551aed4bdcb39cf6c5e51b1267b1221666e6090bddc1a0eaf89e7c3e2a3" + CACHE INTERNAL "") + set(SUPPORT_PKG_URL "https://github.com/avast/retdec-support/releases/download/2019-03-08/retdec-support_2019-03-08.tar.xz" CACHE INTERNAL "URL of RetDec support package to use." diff --git a/cmake/options.cmake b/cmake/options.cmake index 375882aca..3ebff99a8 100644 --- a/cmake/options.cmake +++ b/cmake/options.cmake @@ -510,6 +510,9 @@ set_if_at_least_one_set(RETDEC_ENABLE_RAPIDJSON RETDEC_ENABLE_MACHO_EXTRACTORTOOL RETDEC_ENABLE_SERDES) +set_if_at_least_one_set(RETDEC_ENABLE_EIGEN + RETDEC_ENABLE_BIN2LLVMIR) + set_if_at_least_one_set(RETDEC_ENABLE_TINYXML2 RETDEC_ENABLE_TINYXML2 RETDEC_ENABLE_FILEINFO diff --git a/deps/CMakeLists.txt b/deps/CMakeLists.txt index cf5d8be50..8028f961d 100644 --- a/deps/CMakeLists.txt +++ b/deps/CMakeLists.txt @@ -28,3 +28,4 @@ cond_add_subdirectory(tinyxml2 RETDEC_ENABLE_TINYXML2) cond_add_subdirectory(whereami RETDEC_ENABLE_WHEREAMI) cond_add_subdirectory(yara RETDEC_ENABLE_YARA) cond_add_subdirectory(yaramod RETDEC_ENABLE_YARAMOD) +cond_add_subdirectory(eigen RETDEC_ENABLE_EIGEN) diff --git a/deps/eigen/CMakeLists.txt b/deps/eigen/CMakeLists.txt new file mode 100644 index 000000000..7d92d1b1e --- /dev/null +++ b/deps/eigen/CMakeLists.txt @@ -0,0 +1,41 @@ + +include(ExternalProject) + +if(CMAKE_C_COMPILER) + set(CMAKE_C_COMPILER_OPTION "-DCMAKE_C_COMPILER=${CMAKE_C_COMPILER}") +endif() +if(CMAKE_CXX_COMPILER) + set(CMAKE_CXX_COMPILER_OPTION "-DCMAKE_CXX_COMPILER=${CMAKE_CXX_COMPILER}") +endif() + +ExternalProject_Add(eigen_project + URL ${EIGEN_URL} + URL_HASH SHA256=${EIGEN_ARCHIVE_SHA256} + DOWNLOAD_NAME "eigen.zip" + CMAKE_ARGS + "${CMAKE_C_COMPILER_OPTION}" + "${CMAKE_CXX_COMPILER_OPTION}" + # Disable the install step. + INSTALL_COMMAND "" +) + +add_library(eigen INTERFACE) +add_library(retdec::deps::eigen ALIAS eigen) +add_dependencies(eigen eigen_project) + +ExternalProject_Get_Property(eigen_project source_dir) + +set(EIGEN_INCLUDE_DIR "${source_dir}/Eigen") + +target_include_directories(eigen INTERFACE $) + +install(TARGETS eigen + EXPORT eigen-targets +) + +# Export targets. +install(EXPORT eigen-targets + FILE "retdec-eigen-targets.cmake" + NAMESPACE retdec::deps:: + DESTINATION ${RETDEC_INSTALL_CMAKE_DIR} +) diff --git a/deps/eigen/README.md b/deps/eigen/README.md new file mode 100644 index 000000000..e4797db45 --- /dev/null +++ b/deps/eigen/README.md @@ -0,0 +1,8 @@ +## Eigen + +A clone of only the needed sources (headers) of [Eigen](http://eigen.tuxfamily.org/index.php?title=Main_Page). +Upstream commit: `6601abce868e3284b4829a4fbf91eefaa0d704af` + +## License + +Eigen is [Free Software](http://www.gnu.org/philosophy/free-sw.html). Starting from the 3.1.1 version, it is licensed under the [MPL2](http://www.mozilla.org/MPL/2.0), which is a simple weak copyleft license. Common questions about the MPL2 are answered in the official [MPL2 FAQ](http://www.mozilla.org/MPL/2.0/FAQ.html). diff --git a/deps/eigen/license.txt b/deps/eigen/license.txt new file mode 100644 index 000000000..8f12b4bd5 --- /dev/null +++ b/deps/eigen/license.txt @@ -0,0 +1,375 @@ +Eigen is licensed under the MPL2, + +Mozilla Public License Version 2.0 +================================== + +1. Definitions +-------------- + +1.1. "Contributor" + means each individual or legal entity that creates, contributes to + the creation of, or owns Covered Software. + +1.2. "Contributor Version" + means the combination of the Contributions of others (if any) used + by a Contributor and that particular Contributor's Contribution. + +1.3. "Contribution" + means Covered Software of a particular Contributor. + +1.4. "Covered Software" + means Source Code Form to which the initial Contributor has attached + the notice in Exhibit A, the Executable Form of such Source Code + Form, and Modifications of such Source Code Form, in each case + including portions thereof. + +1.5. "Incompatible With Secondary Licenses" + means + + (a) that the initial Contributor has attached the notice described + in Exhibit B to the Covered Software; or + + (b) that the Covered Software was made available under the terms of + version 1.1 or earlier of the License, but not also under the + terms of a Secondary License. + +1.6. "Executable Form" + means any form of the work other than Source Code Form. + +1.7. "Larger Work" + means a work that combines Covered Software with other material, in + a separate file or files, that is not Covered Software. + +1.8. "License" + means this document. + +1.9. "Licensable" + means having the right to grant, to the maximum extent possible, + whether at the time of the initial grant or subsequently, any and + all of the rights conveyed by this License. + +1.10. "Modifications" + means any of the following: + + (a) any file in Source Code Form that results from an addition to, + deletion from, or modification of the contents of Covered + Software; or + + (b) any new file in Source Code Form that contains any Covered + Software. + +1.11. "Patent Claims" of a Contributor + means any patent claim(s), including without limitation, method, + process, and apparatus claims, in any patent Licensable by such + Contributor that would be infringed, but for the grant of the + License, by the making, using, selling, offering for sale, having + made, import, or transfer of either its Contributions or its + Contributor Version. + +1.12. "Secondary License" + means either the GNU General Public License, Version 2.0, the GNU + Lesser General Public License, Version 2.1, the GNU Affero General + Public License, Version 3.0, or any later versions of those + licenses. + +1.13. "Source Code Form" + means the form of the work preferred for making modifications. + +1.14. "You" (or "Your") + means an individual or a legal entity exercising rights under this + License. For legal entities, "You" includes any entity that + controls, is controlled by, or is under common control with You. For + purposes of this definition, "control" means (a) the power, direct + or indirect, to cause the direction or management of such entity, + whether by contract or otherwise, or (b) ownership of more than + fifty percent (50%) of the outstanding shares or beneficial + ownership of such entity. + +2. License Grants and Conditions +-------------------------------- + +2.1. Grants + +Each Contributor hereby grants You a world-wide, royalty-free, +non-exclusive license: + +(a) under intellectual property rights (other than patent or trademark) + Licensable by such Contributor to use, reproduce, make available, + modify, display, perform, distribute, and otherwise exploit its + Contributions, either on an unmodified basis, with Modifications, or + as part of a Larger Work; and + +(b) under Patent Claims of such Contributor to make, use, sell, offer + for sale, have made, import, and otherwise transfer either its + Contributions or its Contributor Version. + +2.2. Effective Date + +The licenses granted in Section 2.1 with respect to any Contribution +become effective for each Contribution on the date the Contributor first +distributes such Contribution. + +2.3. Limitations on Grant Scope + +The licenses granted in this Section 2 are the only rights granted under +this License. No additional rights or licenses will be implied from the +distribution or licensing of Covered Software under this License. +Notwithstanding Section 2.1(b) above, no patent license is granted by a +Contributor: + +(a) for any code that a Contributor has removed from Covered Software; + or + +(b) for infringements caused by: (i) Your and any other third party's + modifications of Covered Software, or (ii) the combination of its + Contributions with other software (except as part of its Contributor + Version); or + +(c) under Patent Claims infringed by Covered Software in the absence of + its Contributions. + +This License does not grant any rights in the trademarks, service marks, +or logos of any Contributor (except as may be necessary to comply with +the notice requirements in Section 3.4). + +2.4. Subsequent Licenses + +No Contributor makes additional grants as a result of Your choice to +distribute the Covered Software under a subsequent version of this +License (see Section 10.2) or under the terms of a Secondary License (if +permitted under the terms of Section 3.3). + +2.5. Representation + +Each Contributor represents that the Contributor believes its +Contributions are its original creation(s) or it has sufficient rights +to grant the rights to its Contributions conveyed by this License. + +2.6. Fair Use + +This License is not intended to limit any rights You have under +applicable copyright doctrines of fair use, fair dealing, or other +equivalents. + +2.7. Conditions + +Sections 3.1, 3.2, 3.3, and 3.4 are conditions of the licenses granted +in Section 2.1. + +3. Responsibilities +------------------- + +3.1. Distribution of Source Form + +All distribution of Covered Software in Source Code Form, including any +Modifications that You create or to which You contribute, must be under +the terms of this License. You must inform recipients that the Source +Code Form of the Covered Software is governed by the terms of this +License, and how they can obtain a copy of this License. You may not +attempt to alter or restrict the recipients' rights in the Source Code +Form. + +3.2. Distribution of Executable Form + +If You distribute Covered Software in Executable Form then: + +(a) such Covered Software must also be made available in Source Code + Form, as described in Section 3.1, and You must inform recipients of + the Executable Form how they can obtain a copy of such Source Code + Form by reasonable means in a timely manner, at a charge no more + than the cost of distribution to the recipient; and + +(b) You may distribute such Executable Form under the terms of this + License, or sublicense it under different terms, provided that the + license for the Executable Form does not attempt to limit or alter + the recipients' rights in the Source Code Form under this License. + +3.3. Distribution of a Larger Work + +You may create and distribute a Larger Work under terms of Your choice, +provided that You also comply with the requirements of this License for +the Covered Software. If the Larger Work is a combination of Covered +Software with a work governed by one or more Secondary Licenses, and the +Covered Software is not Incompatible With Secondary Licenses, this +License permits You to additionally distribute such Covered Software +under the terms of such Secondary License(s), so that the recipient of +the Larger Work may, at their option, further distribute the Covered +Software under the terms of either this License or such Secondary +License(s). + +3.4. Notices + +You may not remove or alter the substance of any license notices +(including copyright notices, patent notices, disclaimers of warranty, +or limitations of liability) contained within the Source Code Form of +the Covered Software, except that You may alter any license notices to +the extent required to remedy known factual inaccuracies. + +3.5. Application of Additional Terms + +You may choose to offer, and to charge a fee for, warranty, support, +indemnity or liability obligations to one or more recipients of Covered +Software. However, You may do so only on Your own behalf, and not on +behalf of any Contributor. You must make it absolutely clear that any +such warranty, support, indemnity, or liability obligation is offered by +You alone, and You hereby agree to indemnify every Contributor for any +liability incurred by such Contributor as a result of warranty, support, +indemnity or liability terms You offer. You may include additional +disclaimers of warranty and limitations of liability specific to any +jurisdiction. + +4. Inability to Comply Due to Statute or Regulation +--------------------------------------------------- + +If it is impossible for You to comply with any of the terms of this +License with respect to some or all of the Covered Software due to +statute, judicial order, or regulation then You must: (a) comply with +the terms of this License to the maximum extent possible; and (b) +describe the limitations and the code they affect. Such description must +be placed in a text file included with all distributions of the Covered +Software under this License. Except to the extent prohibited by statute +or regulation, such description must be sufficiently detailed for a +recipient of ordinary skill to be able to understand it. + +5. Termination +-------------- + +5.1. The rights granted under this License will terminate automatically +if You fail to comply with any of its terms. However, if You become +compliant, then the rights granted under this License from a particular +Contributor are reinstated (a) provisionally, unless and until such +Contributor explicitly and finally terminates Your grants, and (b) on an +ongoing basis, if such Contributor fails to notify You of the +non-compliance by some reasonable means prior to 60 days after You have +come back into compliance. Moreover, Your grants from a particular +Contributor are reinstated on an ongoing basis if such Contributor +notifies You of the non-compliance by some reasonable means, this is the +first time You have received notice of non-compliance with this License +from such Contributor, and You become compliant prior to 30 days after +Your receipt of the notice. + +5.2. If You initiate litigation against any entity by asserting a patent +infringement claim (excluding declaratory judgment actions, +counter-claims, and cross-claims) alleging that a Contributor Version +directly or indirectly infringes any patent, then the rights granted to +You by any and all Contributors for the Covered Software under Section +2.1 of this License shall terminate. + +5.3. In the event of termination under Sections 5.1 or 5.2 above, all +end user license agreements (excluding distributors and resellers) which +have been validly granted by You or Your distributors under this License +prior to termination shall survive termination. + +************************************************************************ +* * +* 6. Disclaimer of Warranty * +* ------------------------- * +* * +* Covered Software is provided under this License on an "as is" * +* basis, without warranty of any kind, either expressed, implied, or * +* statutory, including, without limitation, warranties that the * +* Covered Software is free of defects, merchantable, fit for a * +* particular purpose or non-infringing. The entire risk as to the * +* quality and performance of the Covered Software is with You. * +* Should any Covered Software prove defective in any respect, You * +* (not any Contributor) assume the cost of any necessary servicing, * +* repair, or correction. This disclaimer of warranty constitutes an * +* essential part of this License. No use of any Covered Software is * +* authorized under this License except under this disclaimer. * +* * +************************************************************************ + +************************************************************************ +* * +* 7. Limitation of Liability * +* -------------------------- * +* * +* Under no circumstances and under no legal theory, whether tort * +* (including negligence), contract, or otherwise, shall any * +* Contributor, or anyone who distributes Covered Software as * +* permitted above, be liable to You for any direct, indirect, * +* special, incidental, or consequential damages of any character * +* including, without limitation, damages for lost profits, loss of * +* goodwill, work stoppage, computer failure or malfunction, or any * +* and all other commercial damages or losses, even if such party * +* shall have been informed of the possibility of such damages. This * +* limitation of liability shall not apply to liability for death or * +* personal injury resulting from such party's negligence to the * +* extent applicable law prohibits such limitation. Some * +* jurisdictions do not allow the exclusion or limitation of * +* incidental or consequential damages, so this exclusion and * +* limitation may not apply to You. * +* * +************************************************************************ + +8. Litigation +------------- + +Any litigation relating to this License may be brought only in the +courts of a jurisdiction where the defendant maintains its principal +place of business and such litigation shall be governed by laws of that +jurisdiction, without reference to its conflict-of-law provisions. +Nothing in this Section shall prevent a party's ability to bring +cross-claims or counter-claims. + +9. Miscellaneous +---------------- + +This License represents the complete agreement concerning the subject +matter hereof. If any provision of this License is held to be +unenforceable, such provision shall be reformed only to the extent +necessary to make it enforceable. Any law or regulation which provides +that the language of a contract shall be construed against the drafter +shall not be used to construe this License against a Contributor. + +10. Versions of the License +--------------------------- + +10.1. New Versions + +Mozilla Foundation is the license steward. Except as provided in Section +10.3, no one other than the license steward has the right to modify or +publish new versions of this License. Each version will be given a +distinguishing version number. + +10.2. Effect of New Versions + +You may distribute the Covered Software under the terms of the version +of the License under which You originally received the Covered Software, +or under the terms of any subsequent version published by the license +steward. + +10.3. Modified Versions + +If you create software not governed by this License, and you want to +create a new license for such software, you may create and use a +modified version of this License if you rename the license and remove +any references to the name of the license steward (except to note that +such modified license differs from this License). + +10.4. Distributing Source Code Form that is Incompatible With Secondary +Licenses + +If You choose to distribute Source Code Form that is Incompatible With +Secondary Licenses under the terms of this version of the License, the +notice described in Exhibit B of this License must be attached. + +Exhibit A - Source Code Form License Notice +------------------------------------------- + + This Source Code Form is subject to the terms of the Mozilla Public + License, v. 2.0. If a copy of the MPL was not distributed with this + file, You can obtain one at http://mozilla.org/MPL/2.0/. + +If it is not possible or desirable to put the notice in a particular +file, then You may include the notice in a location (such as a LICENSE +file in a relevant directory) where a recipient would be likely to look +for such a notice. + +You may add additional accurate notices of copyright ownership. + +Exhibit B - "Incompatible With Secondary Licenses" Notice +--------------------------------------------------------- + + This Source Code Form is "Incompatible With Secondary Licenses", as + defined by the Mozilla Public License, v. 2.0. diff --git a/deps/eigen/retdec-eigen-config.cmake b/deps/eigen/retdec-eigen-config.cmake new file mode 100644 index 000000000..43d09bb1f --- /dev/null +++ b/deps/eigen/retdec-eigen-config.cmake @@ -0,0 +1,4 @@ + +if(NOT TARGET retdec::deps::eigen) + include(${CMAKE_CURRENT_LIST_DIR}/retdec-eigen-targets.cmake) +endif() diff --git a/include/retdec/bin2llvmir/optimizations/x87_fpu/x87_fpu.h b/include/retdec/bin2llvmir/optimizations/x87_fpu/x87_fpu.h index 16127c9ed..3940a6e37 100644 --- a/include/retdec/bin2llvmir/optimizations/x87_fpu/x87_fpu.h +++ b/include/retdec/bin2llvmir/optimizations/x87_fpu/x87_fpu.h @@ -1,25 +1,69 @@ /** * @file include/retdec/bin2llvmir/optimizations/x87_fpu/x87_fpu.h * @brief x87 FPU analysis - replace fpu stack operations with FPU registers. -* @copyright (c) 2017 Avast Software, licensed under the MIT license +* @copyright (c) 2019 Avast Software, licensed under the MIT license */ #ifndef RETDEC_BIN2LLVMIR_OPTIMIZATIONS_X87_FPU_X87_FPU_H #define RETDEC_BIN2LLVMIR_OPTIMIZATIONS_X87_FPU_X87_FPU_H #include -#include #include #include +//eigen lib +#include "Dense" + #include "retdec/bin2llvmir/analyses/symbolic_tree.h" #include "retdec/bin2llvmir/providers/abi/abi.h" #include "retdec/bin2llvmir/providers/config.h" +#define EMPTY_FPU_STACK 8 +#define RETURN_VALUE_PASSED_THROUGH_ST0 7 +#define DECREMENT_FPU_STACK -1 +#define NOP_FPU_STACK 0 +#define ANALYZE_FAIL false +#define ANALYZE_SUCCESS true +#define PERFORMANCE_CEIL 1000 + namespace retdec { namespace bin2llvmir { +class FunctionAnalyzeMetadata +{ + public: + + bool analyzeSuccess = true; + enum IndexType { + inIndex, outIndex + }; + + llvm::Function& function; + std::map> indexes; + + std::list terminatingBasicBlocks; + // A * x = B + Eigen::MatrixXd A; + Eigen::MatrixXd B; + Eigen::MatrixXd x; + + int numberOfEquations = 0; + + // 1. index to register, 2.pseudo instruction + std::list> pseudoCalls; + std::map topVals; + + int expectedTop = 0; + bool expectedTopAnalyzed = false; + std::set calledFunctions; + + void initSystem(); + void addEquation(const std::list>& vars, int result); + FunctionAnalyzeMetadata(llvm::Function &function1) : function(function1) {}; + +}; + class X87FpuAnalysis : public llvm::ModulePass { public: @@ -33,20 +77,36 @@ class X87FpuAnalysis : public llvm::ModulePass private: bool run(); - bool analyzeBb( - retdec::utils::NonIterableSet& seenBbs, - std::map& topVals, + bool analyzeBasicBlock( + FunctionAnalyzeMetadata& funMd, llvm::BasicBlock* bb, - int topVal); - void removeAllFpuTopOperations(); + int& outTop); + bool analyzeInstruction( + FunctionAnalyzeMetadata& funMd, + llvm::Instruction* i, + int& outTop); + std::list getFunctions2Analyze(); + + void printBlocksAnalyzeResult(); + /** + * Replace all FPU pseudo load and store function by load and store with concrete FPU registers. + */ + bool optimizeAnalyzedFpuInstruction(); + int expectedTopBasedOnRestOfBlock(llvm::Instruction& analyzedInstr); + int augmentedRank(Eigen::MatrixXd &A, Eigen::MatrixXd &B); + bool checkArchAndCallConvException(llvm::Function* fun); + bool isValidRegisterIndex(int index); private: + llvm::Module* _module = nullptr; Config* _config = nullptr; Abi* _abi = nullptr; llvm::GlobalVariable* top = nullptr; - std::unordered_set _toRemove; + std::list analyzedFunctionsMetadata; //functions where detected FPU stack access + std::list::iterator getFunMd(llvm::Function* fun); + }; } // namespace bin2llvmir diff --git a/src/bin2llvmir/CMakeLists.txt b/src/bin2llvmir/CMakeLists.txt index a9e9616d5..dabc6bea2 100644 --- a/src/bin2llvmir/CMakeLists.txt +++ b/src/bin2llvmir/CMakeLists.txt @@ -132,6 +132,7 @@ target_link_libraries(bin2llvmir retdec::utils retdec::llvm-support retdec::deps::llvm + retdec::deps::eigen ) set_target_properties(bin2llvmir diff --git a/src/bin2llvmir/optimizations/x87_fpu/x87_fpu.cpp b/src/bin2llvmir/optimizations/x87_fpu/x87_fpu.cpp index dde5b0a7f..608140990 100644 --- a/src/bin2llvmir/optimizations/x87_fpu/x87_fpu.cpp +++ b/src/bin2llvmir/optimizations/x87_fpu/x87_fpu.cpp @@ -1,7 +1,7 @@ /** * @file src/bin2llvmir/optimizations/x87_fpu/x87_fpu.cpp * @brief x87 FPU analysis - replace fpu stack operations with FPU registers. -* @copyright (c) 2017 Avast Software, licensed under the MIT license +* @copyright (c) 2020 Avast Software, licensed under the MIT license */ #include @@ -13,8 +13,10 @@ #include "retdec/bin2llvmir/providers/asm_instruction.h" #include "retdec/bin2llvmir/utils/debug.h" #define debug_enabled false + #include "retdec/bin2llvmir/utils/ir_modifier.h" #include "retdec/bin2llvmir/utils/llvm.h" +#include "retdec/capstone2llvmir/x86/x86.h" using namespace llvm; using namespace retdec::bin2llvmir::llvm_utils; @@ -56,212 +58,434 @@ bool X87FpuAnalysis::runOnModuleCustom( return run(); } +std::list X87FpuAnalysis::getFunctions2Analyze() +{ + std::list functions; + for (Value::use_iterator k = top->use_begin(); k != top->use_end(); ++k) + { + if (Instruction *ins= dyn_cast(k->getUser())) + { + functions.push_back(ins->getParent()->getParent()); + } + } + functions.sort(); + functions.unique(); + + std::list functionsMetadata; + for (auto &f : functions) + { + unsigned index = 0; + FunctionAnalyzeMetadata metadata(*f); + for (Function::iterator it = f->begin(), end = f->end(); it != end; ++it) + { + BasicBlock* bb = it.operator->(); + Instruction& endInst = bb->getInstList().back(); + if (dyn_cast(&endInst)) //it is terminating block + { + metadata.terminatingBasicBlocks.push_back(bb); + } + metadata.indexes[bb][FunctionAnalyzeMetadata::inIndex] = index; + metadata.indexes[bb][FunctionAnalyzeMetadata::outIndex] = index+1; + index += 2; + } + functionsMetadata.push_back(metadata); + } + + return functionsMetadata; +} + +int X87FpuAnalysis::augmentedRank(Eigen::MatrixXd &A, Eigen::MatrixXd &B) +{ + A.conservativeResize(Eigen::NoChange, A.cols()+1); + A.col(A.cols()-1) = B; + + int rankAugmentedA = A.colPivHouseholderQr().rank(); + + A.conservativeResize(Eigen::NoChange, A.cols()-1); + + return rankAugmentedA; +} + +void FunctionAnalyzeMetadata::initSystem() +{ + unsigned matrixLen = 1;// + terminatingBasicBlocks.size(); + for (Function::iterator bbIt=function.begin(), bbEndIt = function.end(); bbIt != bbEndIt; ++bbIt) + { + BasicBlock* bb = bbIt.operator->(); + matrixLen += 1 + pred_size(bb); + } + A.resize(matrixLen, 2*function.size()); + B.resize(matrixLen, 1); + A.setZero(); + B.setZero(); +} + +void FunctionAnalyzeMetadata::addEquation(const std::list>& vars, int result) +{ + B(numberOfEquations, 0) = result; + for (auto var : vars) + { + A(numberOfEquations, indexes[&std::get<0>(var)][std::get<2>(var)]) = std::get<1>(var); + } + + numberOfEquations++; +} + +bool X87FpuAnalysis::checkArchAndCallConvException(llvm::Function* fun) +{ + using CallingConvention = common::CallingConvention::eCC; + + auto configFunctionMetadata = _config->getConfig().functions.getFunctionByName(fun->getName()); + if (!configFunctionMetadata) + return false; + + auto convention = configFunctionMetadata->callingConvention.getID(); + + if (_config->getConfig().architecture.isX86_16() || _config->getConfig().architecture.isX86_32()) + { + switch (convention) + { + case CallingConvention::CC_CDECL: + case CallingConvention::CC_STDCALL: + case CallingConvention::CC_PASCAL: + case CallingConvention::CC_FASTCALL: + case CallingConvention::CC_THISCALL: + case CallingConvention::CC_UNKNOWN: + default: + return true; + case CallingConvention::CC_WATCOM: + return false; //inconsisten + } + } + else // x86-64bit architecture + { + return false; + } +} + bool X87FpuAnalysis::run() { if (_config == nullptr || _abi == nullptr) { - return false; + return ANALYZE_FAIL; } if (!_abi->isX86()) { - return false; + return ANALYZE_FAIL; } top = _abi->getRegister(X87_REG_TOP); if (top == nullptr) { - return false; + return ANALYZE_FAIL; } - bool changed = false; - for (Function& f : *_module) + analyzedFunctionsMetadata = getFunctions2Analyze(); + + for (auto& funMd: analyzedFunctionsMetadata) { - LOG << f.getName().str() << std::endl; + funMd.initSystem(); + BasicBlock& enterBlock = funMd.function.begin().operator*(); + funMd.addEquation({{enterBlock, 1, funMd.inIndex}}, EMPTY_FPU_STACK); - retdec::utils::NonIterableSet seenBbs; - std::map topVals; + for (Function::iterator bbIt=funMd.function.begin(), + bbEndIt = funMd.function.end(); bbIt != bbEndIt; ++bbIt) + { + BasicBlock* bb = bbIt.operator->(); + int relativeOutBbTop = 0; - for (auto& bb : f) + if (!analyzeBasicBlock(funMd, bb, relativeOutBbTop)) + { + funMd.analyzeSuccess = false; + } + + funMd.addEquation({{*bb, -1, funMd.inIndex},{*bb, 1, funMd.outIndex}}, relativeOutBbTop); + + //if (_config->getConfig().architecture.isX86_16() || _config->getConfig().architecture.isX86_64() + // && std::find(funMd.terminatingBasicBlocks.begin(), funMd.terminatingBasicBlocks.end(), bb) != funMd.terminatingBasicBlocks.end()) + //{ + // funMd.addEquation({{*bb, 1, funMd.outIndex}}, EMPTY_FPU_STACK); + //} + + for (auto it = pred_begin(bb), et=pred_end(bb); it != et; ++it) + { + BasicBlock *pred = it.operator*(); + funMd.addEquation({{*bb, 1, funMd.inIndex},{*pred, -1, funMd.outIndex}}, 0); + } + } + + if (funMd.A.rows() <= PERFORMANCE_CEIL) { - int topVal = 8; - changed |= analyzeBb(seenBbs, topVals, &bb, topVal); + const auto& pivHouseholderQr = funMd.A.colPivHouseholderQr(); + int matRank = pivHouseholderQr.rank(); + int augmentedMatRank = augmentedRank(funMd.A, funMd.B); + + if (matRank == augmentedMatRank) // there is exactly one solution + { + funMd.x = pivHouseholderQr.solve(funMd.B); + } + else + { + funMd.analyzeSuccess = false; + } + } + else // worst scenario => due to performance ceil turn to simple no CFG analyse + { + int height = funMd.A.rows(); + funMd.x.resize(height, 1); + for (int i = 0; i < height; ++i) + { + funMd.x(i, 0) = EMPTY_FPU_STACK; + } } } - removeAllFpuTopOperations(); + return optimizeAnalyzedFpuInstruction(); +} - return changed; +void X87FpuAnalysis::printBlocksAnalyzeResult() +{ + std::cerr << "A*x=B\n"; + for (auto& funMd: analyzedFunctionsMetadata) + { + std::cerr << funMd.function.getName().str() <(); + int inputIndex = funMd.indexes[bb][funMd.inIndex]; + int outputIndex = funMd.indexes[bb][funMd.outIndex]; + std::cerr << bb->getName().str()<<":"; + std::cerr << " (in=" << funMd.x(inputIndex, 0);; + std::cerr << ",out=" << funMd.x(outputIndex, 0) << ")\n"; + } + } } -bool X87FpuAnalysis::analyzeBb( - retdec::utils::NonIterableSet& seenBbs, - std::map& topVals, - llvm::BasicBlock* bb, - int topVal) +std::list::iterator X87FpuAnalysis::getFunMd(llvm::Function* fun) { + std::list::iterator it; + for (it = analyzedFunctionsMetadata.begin(); it != analyzedFunctionsMetadata.end(); ++it) + { + auto& funMd = it.operator*(); + if (&funMd.function == fun) + { + return it; + } + } - std::queue> queue; - queue.push({bb, topVal}); - bool changed = false; - while(!queue.empty()) { - auto pair = queue.front(); - auto currentBb = pair.first; - topVal = pair.second; - queue.pop(); - LOG << "\t" << currentBb->getName().str() << std::endl; - - if (seenBbs.has(currentBb)) { - LOG << "\t\t" << "already seen" << std::endl; - return false; + return analyzedFunctionsMetadata.end(); +} + +bool X87FpuAnalysis::analyzeInstruction( + FunctionAnalyzeMetadata& funMd, + Instruction* i, + int& outTop) +{ + auto *callFunction = dyn_cast(i); + auto *loadFpuTop = dyn_cast(i); + auto *storeFpuTop = dyn_cast(i); + auto *add = dyn_cast(i); + auto *sub = dyn_cast(i); + auto *callStore = _config->isLlvmX87StorePseudoFunctionCall(i); + auto *callLoad = _config->isLlvmX87LoadPseudoFunctionCall(i); + + // read actual value of fpu top + if (loadFpuTop && loadFpuTop->getPointerOperand() == top) + { + funMd.topVals[i] = outTop; + } + // store actual value of fpu top + else if (storeFpuTop && storeFpuTop->getPointerOperand() == top && funMd.topVals.find(storeFpuTop->getValueOperand()) != funMd.topVals.end()) + { + outTop = funMd.topVals.find(storeFpuTop->getValueOperand())->second; + } + // function call -> possible change value of fpu top + else if (callFunction && !callStore && !callLoad && !callFunction->getCalledFunction()->isIntrinsic()) + { + auto it = getFunMd(callFunction->getCalledFunction()); + + if (it != analyzedFunctionsMetadata.end()) + { + auto& fun = it.operator*(); + if (fun.expectedTopAnalyzed) + { + outTop += fun.expectedTop; + } + else + { + outTop += expectedTopBasedOnRestOfBlock(*i); + } + } + else // some library function e.g "roundf()" + { + outTop += expectedTopBasedOnRestOfBlock(*i); + } + } + // increment fpu top + else if (add && isa(add->getOperand(1)) && funMd.topVals.find(add->getOperand(0)) != funMd.topVals.end()) + { + //auto *op0 = dyn_cast(add->getOperand(0)); + int oldTopValue = funMd.topVals.find(add->getOperand(0))->second; + int constValue = cast(add->getOperand(1))->getZExtValue();//it should be 1 + int newTopValue = oldTopValue + constValue; + funMd.topVals[i] = newTopValue; + } + // decrement fpu top + else if (sub && isa(sub->getOperand(1)) && funMd.topVals.find(sub->getOperand(0)) != funMd.topVals.end()) + { + //auto *op0 = dyn_cast(sub->getOperand(0)); + int oldTopValue = funMd.topVals.find(sub->getOperand(0))->second; + int constValue = cast(sub->getOperand(1))->getZExtValue();//it should be 1 + int newTopValue = oldTopValue - constValue; + funMd.topVals[i] = newTopValue; + } + // pseudo load/store of fpu top + else if (callStore || callLoad) + { + //pseudo call will be replaced by store/load of concrete register but only if whole analyze succed + int tmp; + if (callStore && funMd.topVals.find(callStore->getArgOperand(0)) != funMd.topVals.end()) + { + tmp = funMd.topVals.find(callStore->getArgOperand(0))->second; + } + else if (callLoad && funMd.topVals.find(callLoad->getArgOperand(0)) != funMd.topVals.end()) + { + tmp = funMd.topVals.find(callLoad->getArgOperand(0))->second; + } + else + { + return ANALYZE_FAIL; } - seenBbs.insert(currentBb); - - auto it = currentBb->begin(); - while (it != currentBb->end()) { - Instruction *i = &(*it); - ++it; - - auto *l = dyn_cast(i); - auto *s = dyn_cast(i); - auto *add = dyn_cast(i); - auto *sub = dyn_cast(i); - auto *callStore = _config->isLlvmX87StorePseudoFunctionCall(i); - auto *callLoad = _config->isLlvmX87LoadPseudoFunctionCall(i); - - if (l && l->getPointerOperand() == top) { - topVals[i] = topVal; - - LOG << "\t\t" << AsmInstruction(i).getAddress() - << " @ " << std::dec << topVal << std::endl; - } else if (s - && s->getPointerOperand() == top - && topVals.find(s->getValueOperand()) != topVals.end()) { - auto fIt = topVals.find(s->getValueOperand()); - topVal = fIt->second; - - LOG << "\t\t" << AsmInstruction(i).getAddress() - << " @ " << std::dec << fIt->second << std::endl; - } else if (add - && topVals.find(add->getOperand(0)) != topVals.end() - && isa(add->getOperand(1))) { - auto fIt = topVals.find(add->getOperand(0)); - auto *ci = cast(add->getOperand(1)); - // Constants are i3, so 7 can be represented as -1, we need to either - // use zext here (potentially dangerous if instructions were already - // modified and there are true negative values), or compute values - // in i3 arithmetics. - int tmp = fIt->second + ci->getZExtValue(); - if (tmp > 8) { - LOG << "\t\t\t" << "overflow fix " << tmp << " -> " << 8 - << std::endl; - tmp = 8; - } - topVals[i] = tmp; - - LOG << "\t\t" << AsmInstruction(i).getAddress() << std::dec - << " @ " << fIt->second << " + " << ci->getZExtValue() - << " = " << tmp << std::endl; - } else if (sub - && topVals.find(sub->getOperand(0)) != topVals.end() - && isa(sub->getOperand(1))) { - auto fIt = topVals.find(sub->getOperand(0)); - auto *ci = cast(sub->getOperand(1)); - // Constants are i3, so 7 can be represented as -1, we need to either - // use zext here (potentially dangerous if instructions were already - // modified and there are true negative values), or compute values - // in i3 arithmetics. - int tmp = fIt->second - ci->getZExtValue(); - if (tmp < 0) { - LOG << "\t\t\t" << "undeflow fix " << tmp << " -> " << 7 - << std::endl; - tmp = 7; - } - topVals[i] = tmp; - - LOG << "\t\t" << AsmInstruction(i).getAddress() << std::dec - << " @ " << fIt->second << " - " << ci->getZExtValue() << " = " - << tmp << std::endl; - } else if (callStore - && topVals.find(callStore->getArgOperand(0)) != topVals.end()) { - auto fIt = topVals.find(callStore->getArgOperand(0)); - auto tmp = fIt->second; - - uint32_t regBase = X86_REG_ST0; - // Storing value to an empty stack -> suspicious. - if (tmp == 8) { - tmp = 7; - topVal = 7; - } - int regNum = tmp % 8; - auto *reg = _abi->getRegister(regBase + regNum); - - LOG << "\t\t\t" << "store -- " << reg->getName().str() << std::endl; - new StoreInst(callStore->getArgOperand(1), reg, callStore); - _toRemove.insert(callStore->getArgOperand(0)); - // We need to remove this righ away. - // It does not work if we store it to _toRemove set. - callStore->eraseFromParent(); - changed = true; - } else if (callLoad - && topVals.find(callLoad->getArgOperand(0)) != topVals.end()) { - auto fIt = topVals.find(callLoad->getArgOperand(0)); - auto tmp = fIt->second; - - uint32_t regBase = X86_REG_ST0; - // Loading value from an empty stack -> value may have been placed - // there without us knowing, e.g. return value of some other - // function. - if (tmp == 8) { - tmp = 7; - topVal = 7; - } - int regNum = tmp % 8; - auto *reg = _abi->getRegister(regBase + regNum); - - LOG << "\t\t\t" << "load -- " << reg->getName().str() << std::endl; + funMd.pseudoCalls.push_back({tmp, i}); + } - auto *lTmp = new LoadInst(reg, "", callLoad); - auto *conv = IrModifier::convertValueToType(lTmp, callLoad->getType(), callLoad); + return ANALYZE_SUCCESS; +} - callLoad->replaceAllUsesWith(conv); - // We need to remove this righ away. - // It does not work if we store it to _toRemove set. - callLoad->eraseFromParent(); - changed = true; - } else if (callStore || callLoad) { - LOG << "\t\t" << AsmInstruction(i).getAddress() << " @ " - << llvmObjToString(i) << std::endl; - assert(false && "some other pattern"); - return false; +int X87FpuAnalysis::expectedTopBasedOnRestOfBlock(llvm::Instruction& analyzedInstr) +{ + if (!checkArchAndCallConvException(analyzedInstr.getParent()->getParent())) + { + return NOP_FPU_STACK; + } + + std::map topVals; + BasicBlock* bb = analyzedInstr.getParent(); + Instruction *next = analyzedInstr.getNextNode(); + + if (!next || next->getParent() != bb) + { + return NOP_FPU_STACK; + } + + for (BasicBlock::iterator it = next->getIterator(), e = bb->end(); it != e; ++it) + { + Instruction *i = it.operator->(); + auto *loadFpuTop = dyn_cast(i); + auto *sub = dyn_cast(i); + auto *callLoad = _config->isLlvmX87LoadPseudoFunctionCall(i); + auto *callFunction = dyn_cast(i); + + if (loadFpuTop && loadFpuTop->getPointerOperand() == top) + { + topVals[i] = true; + } + else if (sub && isa(sub->getOperand(1)) && topVals.find(sub->getOperand(0)) != topVals.end()) + { + return NOP_FPU_STACK; + } + else if (callFunction && !callLoad) + { + return NOP_FPU_STACK; + } + else if (callLoad && topVals.find(callLoad->getArgOperand(0)) != topVals.end()) + { + auto *callFunction = dyn_cast(&analyzedInstr); + auto it = getFunMd(callFunction->getCalledFunction()); + if (it != analyzedFunctionsMetadata.end()) + { + auto& fun = it.operator*(); + fun.expectedTop = RETURN_VALUE_PASSED_THROUGH_ST0; + fun.expectedTopAnalyzed = true; } + return DECREMENT_FPU_STACK; } + } + + return NOP_FPU_STACK; +} - for (auto succIt = succ_begin(currentBb), e = succ_end(currentBb); succIt != e; ++succIt) { - auto *succ = *succIt; - queue.push({succ, topVal}); +bool X87FpuAnalysis::analyzeBasicBlock( + FunctionAnalyzeMetadata& funMd, + llvm::BasicBlock* bb, + int& outTop) +{ + std::map topVals; + for (BasicBlock::iterator it = bb->begin(), e = bb->end(); it != e; ++it) + { + Instruction* inst = it.operator->(); + if (!analyzeInstruction(funMd, inst, outTop)) + { + return ANALYZE_FAIL; } } - return changed; + + return ANALYZE_SUCCESS; } -void X87FpuAnalysis::removeAllFpuTopOperations() +bool X87FpuAnalysis::isValidRegisterIndex(int index) { - // std::unordered_set toRemove; - for (Function& f : *_module) - for (auto it = inst_begin(&f), eIt = inst_end(&f); it != eIt; ++it) + return (X86_REG_ST0 <= index && index <= X86_REG_ST7); +} + +bool X87FpuAnalysis::optimizeAnalyzedFpuInstruction() +{ + bool analyzeSucces = true; + for (auto& funMd : analyzedFunctionsMetadata) { - Instruction* i = &*it; - if (auto* l = dyn_cast(i); l && l->getPointerOperand() == top) + if (!funMd.analyzeSuccess) { - _toRemove.insert(i); + analyzeSucces = false; + continue; } - if (auto* s = dyn_cast(i); s && s->getPointerOperand() == top) + + for (auto& i : funMd.pseudoCalls) { - _toRemove.insert(i); + int regBase = uint32_t(X86_REG_ST0); + auto *callStore = _config->isLlvmX87StorePseudoFunctionCall(i.second); + auto *callLoad = _config->isLlvmX87LoadPseudoFunctionCall(i.second); + + double bbIn = funMd.x(funMd.indexes[i.second->getParent()][funMd.inIndex], 0); + int diff = (int)i.first % EMPTY_FPU_STACK; // correction of possible stack over/under-flow + int top = (int)round(bbIn) + diff; // value of stack at the beginnig of BB + difference at actual instr + + int registerIndex; + GlobalVariable *reg; + if (!isValidRegisterIndex(registerIndex = regBase + top%EMPTY_FPU_STACK) || !(reg =_abi->getRegister(registerIndex))) + { + analyzeSucces = false; + continue; + } + + if (callStore) + { + new StoreInst(callStore->getArgOperand(1), reg, callStore); + callStore->eraseFromParent(); + } + if (callLoad) + { + auto *lTmp = new LoadInst(reg, "", callLoad); + auto *conv = IrModifier::convertValueToType(lTmp, callLoad->getType(), callLoad); + callLoad->replaceAllUsesWith(conv); + callLoad->eraseFromParent(); + } } } - IrModifier::eraseUnusedInstructionsRecursive(_toRemove); + + return analyzeSucces; } } // namespace bin2llvmir diff --git a/src/bin2llvmir/retdec-bin2llvmir-config.cmake b/src/bin2llvmir/retdec-bin2llvmir-config.cmake index 5ff7638bc..17b44c095 100644 --- a/src/bin2llvmir/retdec-bin2llvmir-config.cmake +++ b/src/bin2llvmir/retdec-bin2llvmir-config.cmake @@ -16,6 +16,7 @@ if(NOT TARGET retdec::bin2llvmir) utils llvm-support llvm + eigen ) include(${CMAKE_CURRENT_LIST_DIR}/retdec-bin2llvmir-targets.cmake) diff --git a/tests/bin2llvmir/CMakeLists.txt b/tests/bin2llvmir/CMakeLists.txt index 620e410a7..d4234dd10 100644 --- a/tests/bin2llvmir/CMakeLists.txt +++ b/tests/bin2llvmir/CMakeLists.txt @@ -12,6 +12,7 @@ add_executable(tests-bin2llvmir optimizations/value_protect/value_protect_test.cpp optimizations/x86_addr_spaces/x86_addr_spaces_pass_test.cpp optimizations/x86_addr_spaces/x86_addr_spaces_test.cpp + optimizations/x87_fpu/x87_fpu_test.cpp providers/asm_instruction_tests.cpp providers/config_tests.cpp providers/debugformat_tests.cpp @@ -22,8 +23,7 @@ add_executable(tests-bin2llvmir utils/instcombine_tests.cpp utils/ir_modifier_tests.cpp utils/llvm_tests.cpp - utils/simplifycfg_tests.cpp -) + utils/simplifycfg_tests.cpp) target_include_directories(tests-bin2llvmir PRIVATE diff --git a/tests/bin2llvmir/optimizations/x87_fpu/x87_fpu_test.cpp b/tests/bin2llvmir/optimizations/x87_fpu/x87_fpu_test.cpp new file mode 100644 index 000000000..c13bdf657 --- /dev/null +++ b/tests/bin2llvmir/optimizations/x87_fpu/x87_fpu_test.cpp @@ -0,0 +1,1700 @@ +/** +* @file tests/bin2llvmir/optimizations/x87_fpu/x87_fpu.cpp +* @brief Tests for the @c X87FpuAnalysis. +* @copyright (c) 2019 Avast Software, licensed under the MIT license +*/ + +#include "bin2llvmir/utils/llvmir_tests.h" +#include "retdec/bin2llvmir/optimizations/x87_fpu/x87_fpu.h" +#include "retdec/bin2llvmir/providers/abi/abi.h" +#include "retdec/utils/string.h" + +using namespace ::testing; +using namespace llvm; + +namespace retdec { +namespace bin2llvmir { +namespace tests { + + +/** + * @brief Tests for the @c X87FpuAnalysis. + */ +class X87FpuAnalysisTests: public LlvmIrTests +{ +protected: + Abi *abi; + Config config; + + X87FpuAnalysis pass; + void setX86Environment(std::string architecture, std::string callingConvention); + + const std::string PREDEFINED_REGISTERS_AND_FUNCTIONS = R"( + @fpu_stat_TOP = internal global i3 0 + @st0 = internal global x86_fp80 0xK00000000000000000000 + @st1 = internal global x86_fp80 0xK00000000000000000000 + @st2 = internal global x86_fp80 0xK00000000000000000000 + @st3 = internal global x86_fp80 0xK00000000000000000000 + @st4 = internal global x86_fp80 0xK00000000000000000000 + @st5 = internal global x86_fp80 0xK00000000000000000000 + @st6 = internal global x86_fp80 0xK00000000000000000000 + @st7 = internal global x86_fp80 0xK00000000000000000000 + + declare void @__frontend_reg_store.fpr(i3, x86_fp80) + declare x86_fp80 @__frontend_reg_load.fpr(i3) + )"; +}; //X87FpuAnalysisTests + +void X87FpuAnalysisTests::setX86Environment(std::string architecture, std::string callingConvention) +{ + config = Config::fromJsonString(module.get(), R"({ + "architecture" : { + "bitSize" : )" + architecture + R"(, + "endian" : "little", + "name" : "x86" + }, + "mainAddress" : "0x1000", + "functions" : + [ + { + "callingConvention" : ")" + callingConvention + R"(", + "name" : "foo" + }, + { + "callingConvention" : ")" + callingConvention + R"(", + "name" : "boo" + } + ] + })"); + + + config.setLlvmX87DataStorePseudoFunction(getFunctionByName("__frontend_reg_store.fpr")); + config.setLlvmX87DataLoadPseudoFunction(getFunctionByName("__frontend_reg_load.fpr")); + + abi = AbiProvider::addAbi(module.get(), &config); + abi->addRegister(X87_REG_TOP, getGlobalByName("fpu_stat_TOP")); + + unsigned numberOfFpuRegisters = 8; + for (unsigned i = 0; i < numberOfFpuRegisters; i++) + { + abi->addRegister(X86_REG_ST0 + i, getGlobalByName("st"+std::to_string(i))); + } +} + +// Architecture: 16bit +// Calling convention: cdecl +// Operation: Call function with floating-point return value. + +TEST_F(X87FpuAnalysisTests, x86_16bit_cdecl_call_of_analyzed_function_success) +{ + parseInput(PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @foo() { + bb: + %0 = load i3, i3* @fpu_stat_TOP + %1 = sub i3 %0, 1 + store i3 %1, i3* @fpu_stat_TOP + %2 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %2, x86_fp80 0xK3FFF8000000000000000) + %3 = add i3 %2, 1 + store i3 %3, i3* @fpu_stat_TOP + ret void + } + define void @boo() { + bb: + ; ... + call void @foo() + ; fp return value is saved in memory and addr is in AX -> 16bit cdecl convention + ; ... + ret void + })"); + + setX86Environment("16", "cdecl"); + bool b = pass.runOnModuleCustom(*module, &config, abi); + + std::string exp = PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @foo() { + bb: + %0 = load i3, i3* @fpu_stat_TOP + %1 = sub i3 %0, 1 + store i3 %1, i3* @fpu_stat_TOP + %2 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st7 + %3 = add i3 %2, 1 + store i3 %3, i3* @fpu_stat_TOP + ret void + } + define void @boo() { + bb: + call void @foo() + ret void + })"; + checkModuleAgainstExpectedIr(exp); + EXPECT_TRUE(b); +} // x86_16bit_cdecl_call_of_analyzed_function_success + +TEST_F(X87FpuAnalysisTests, x86_16bit_cdecl_call_of_not_analyzed_function_success) +{ + parseInput(PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @boo() { + bb: + ; ... + call void @foo() + ; ... + ret void + } + define void @foo() { + bb: + ; ... + %0 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %0, x86_fp80 0xK3FFF8000000000000000) + %1 = sub i3 %0, 1 + store i3 %1, i3* @fpu_stat_TOP + %2 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %2, x86_fp80 0xK3FFF8000000000000000) + %3 = call x86_fp80 @__frontend_reg_load.fpr(i3 %2) + %4 = add i3 %2, 1 + store i3 %4, i3* @fpu_stat_TOP + ; ... + ret void + })"); + + setX86Environment("16", "cdecl"); + bool b = pass.runOnModuleCustom(*module, &config, abi); + + std::string exp = PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @boo() { + bb: + call void @foo() + ret void + } + define void @foo() { + bb: + %0 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st0 + %1 = sub i3 %0, 1 + store i3 %1, i3* @fpu_stat_TOP + %2 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st7 + %3 = load x86_fp80, x86_fp80* @st7 + %4 = add i3 %2, 1 + store i3 %4, i3* @fpu_stat_TOP + ret void + })"; + checkModuleAgainstExpectedIr(exp); + EXPECT_TRUE(b); +} // x86_16bit_cdecl_call_of_not_analyzed_function_success + +// Architecture: 16bit +// Calling convention: pascal +// Operation: Call function with floating-point return value. + +TEST_F(X87FpuAnalysisTests, x86_16bit_pascal_call_of_analyzed_function_success) +{ + parseInput(PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @foo() { + bb: + %0 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %0, x86_fp80 0xK3FFF8000000000000000) + %1 = sub i3 %0, 1 + call void @__frontend_reg_store.fpr(i3 %1, x86_fp80 0xK3FFF8000000000000000) + %2 = sub i3 %0, 2 + call void @__frontend_reg_store.fpr(i3 %2, x86_fp80 0xK3FFF8000000000000000) + store i3 %2, i3* @fpu_stat_TOP + %3 = load i3, i3* @fpu_stat_TOP + %4 = call x86_fp80 @__frontend_reg_load.fpr(i3 %3) + %5 = add i3 %3, 1 + %6 = add i3 %3, 2 + store i3 %6, i3* @fpu_stat_TOP + ret void + } + define void @boo() { + bb: + call void @foo() + ret void + })"); + + setX86Environment("16", "pascal"); + bool b = pass.runOnModuleCustom(*module, &config, abi); + + std::string exp = PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @foo() { + bb: + %0 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st0 + %1 = sub i3 %0, 1 + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st7 + %2 = sub i3 %0, 2 + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st6 + store i3 %2, i3* @fpu_stat_TOP + %3 = load i3, i3* @fpu_stat_TOP + %4 = load x86_fp80, x86_fp80* @st6 + %5 = add i3 %3, 1 + %6 = add i3 %3, 2 + store i3 %6, i3* @fpu_stat_TOP + ret void + } + define void @boo() { + bb: + call void @foo() + ret void + })"; + checkModuleAgainstExpectedIr(exp); + EXPECT_TRUE(b); +} // x86_16bit_pascal_call_of_analyzed_function_success + +TEST_F(X87FpuAnalysisTests, x86_16bit_pascal_call_of_not_analyzed_function_success) +{ + parseInput(PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @boo() { + bb: + call void @foo() + ret void + } + define void @foo() { + bb: + %0 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %0, x86_fp80 0xK3FFF8000000000000000) + %1 = sub i3 %0, 1 + %2 = sub i3 %1, 1 + call void @__frontend_reg_store.fpr(i3 %1, x86_fp80 0xK3FFF8000000000000000) + call void @__frontend_reg_store.fpr(i3 %2, x86_fp80 0xK3FFF8000000000000000) + store i3 %2, i3* @fpu_stat_TOP + %3 = load i3, i3* @fpu_stat_TOP + %4 = call x86_fp80 @__frontend_reg_load.fpr(i3 %3) + %5 = add i3 %3, 1 + %6 = add i3 %5, 1 + store i3 %6, i3* @fpu_stat_TOP + ret void + })"); + + setX86Environment("16", "pascal"); + bool b = pass.runOnModuleCustom(*module, &config, abi); + + std::string exp = PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @boo() { + bb: + call void @foo() + ret void + } + define void @foo() { + bb: + %0 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st0 + %1 = sub i3 %0, 1 + %2 = sub i3 %1, 1 + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st7 + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st6 + store i3 %2, i3* @fpu_stat_TOP + %3 = load i3, i3* @fpu_stat_TOP + %4 = load x86_fp80, x86_fp80* @st6 + %5 = add i3 %3, 1 + %6 = add i3 %5, 1 + store i3 %6, i3* @fpu_stat_TOP + ret void + })"; + checkModuleAgainstExpectedIr(exp); + EXPECT_TRUE(b); +} // x86_16bit_pascal_call_of_not_analyzed_function_success + +// +// Architecture: 16bit +// Calling convention: fastcall +// Operation: Call function returning floating-point value. +// + +TEST_F(X87FpuAnalysisTests, x86_16bit_fastcall_call_of_analyzed_function_success) +{ + parseInput(PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @foo() { + bb: + %0 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %0, x86_fp80 0xK3FFF8000000000000000) + %1 = sub i3 %0, 1 + store i3 %1, i3* @fpu_stat_TOP + %2 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %2, x86_fp80 0xK3FFF8000000000000000) + %3 = sub i3 %2, 1 + store i3 %3, i3* @fpu_stat_TOP + %4 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %4, x86_fp80 0xK3FFF8000000000000000) + %5 = call x86_fp80 @__frontend_reg_load.fpr(i3 %4) + %6 = add i3 %4, 1 + store i3 %6, i3* @fpu_stat_TOP + %7 = load i3, i3* @fpu_stat_TOP + %8 = call x86_fp80 @__frontend_reg_load.fpr(i3 %7) + %9 = add i3 %7, 1 + store i3 %9, i3* @fpu_stat_TOP + %10 = load i3, i3* @fpu_stat_TOP + %11 = call x86_fp80 @__frontend_reg_load.fpr(i3 %10) + ret void + } + define void @boo() { + bb: + call void @foo() + ret void + })"); + + setX86Environment("16", "fastcall"); + bool b = pass.runOnModuleCustom(*module, &config, abi); + + std::string exp = PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @foo() { + bb: + %0 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st0 + %1 = sub i3 %0, 1 + store i3 %1, i3* @fpu_stat_TOP + %2 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st7 + %3 = sub i3 %2, 1 + store i3 %3, i3* @fpu_stat_TOP + %4 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st6 + %5 = load x86_fp80, x86_fp80* @st6 + %6 = add i3 %4, 1 + store i3 %6, i3* @fpu_stat_TOP + %7 = load i3, i3* @fpu_stat_TOP + %8 = load x86_fp80, x86_fp80* @st7 + %9 = add i3 %7, 1 + store i3 %9, i3* @fpu_stat_TOP + %10 = load i3, i3* @fpu_stat_TOP + %11 = load x86_fp80, x86_fp80* @st0 + ret void + } + define void @boo() { + bb: + call void @foo() + ret void + })"; + checkModuleAgainstExpectedIr(exp); + EXPECT_TRUE(b); +} // x86_16bit_fastcall_call_of_analyzed_function_success + +TEST_F(X87FpuAnalysisTests, x86_16bit_fastcall_call_of_not_analyzed_function_success) +{ + parseInput(PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @boo() { + bb: + call void @foo() + ret void + } + define void @foo() { + bb: + %0 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %0, x86_fp80 0xK3FFF8000000000000000) + %1 = sub i3 %0, 3 + %2 = sub i3 %1, 3 + call void @__frontend_reg_store.fpr(i3 %2, x86_fp80 0xK3FFF8000000000000000) + %3 = sub i3 %2, 2 + call void @__frontend_reg_store.fpr(i3 %3, x86_fp80 0xK3FFF8000000000000000) + %4 = sub i3 %3, 2 + call void @__frontend_reg_store.fpr(i3 %4, x86_fp80 0xK3FFF8000000000000000) + store i3 %4, i3* @fpu_stat_TOP + %5 = load i3, i3* @fpu_stat_TOP + %6 = call x86_fp80 @__frontend_reg_load.fpr(i3 %5) + %7 = add i3 %5, 3 + %8 = add i3 %7, 3; can not add 10 cause of 3bit overflow + %9 = call x86_fp80 @__frontend_reg_load.fpr(i3 %8) + %10 = add i3 %8, 2 + %11 = add i3 %10, 2 + %12 = call x86_fp80 @__frontend_reg_load.fpr(i3 %11) + store i3 %11, i3* @fpu_stat_TOP + ret void + })"); + + setX86Environment("16", "fastcall"); + bool b = pass.runOnModuleCustom(*module, &config, abi); + + std::string exp = PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @boo() { + bb: + call void @foo() + ret void + } + define void @foo() { + bb: + %0 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st0 + %1 = sub i3 %0, 3 + %2 = sub i3 %1, 3 + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st2 + %3 = sub i3 %2, 2 + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st0 + %4 = sub i3 %3, 2 + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st6 + store i3 %4, i3* @fpu_stat_TOP + %5 = load i3, i3* @fpu_stat_TOP + %6 = load x86_fp80, x86_fp80* @st6 + %7 = add i3 %5, 3 + %8 = add i3 %7, 3 + %9 = load x86_fp80, x86_fp80* @st4 + %10 = add i3 %8, 2 + %11 = add i3 %10, 2 + %12 = load x86_fp80, x86_fp80* @st0 + store i3 %11, i3* @fpu_stat_TOP + ret void + })"; + checkModuleAgainstExpectedIr(exp); + EXPECT_TRUE(b); +} // x86_16bit_fastcall_call_of_not_analyzed_function_success + +// +// Architecture: 32bit +// Calling convention: cdecl +// Operation: Call function with floating-point return value. +// + +TEST_F(X87FpuAnalysisTests, x86_32bit_cdecl_call_of_analyzed_function_success) +{ + parseInput(PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @foo() { + bb: + %0 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %0, x86_fp80 0xK3FFF8000000000000000) + %1 = sub i3 %0, 1 + store i3 %1, i3* @fpu_stat_TOP + %2 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %2, x86_fp80 0xK3FFF8000000000000000) + ret void + } + define void @boo() { + bb: + call void @foo() + %0 = load i3, i3* @fpu_stat_TOP + %1 = call x86_fp80 @__frontend_reg_load.fpr(i3 %0) + %2 = add i3 %0, 1 + store i3 %2, i3* @fpu_stat_TOP + %3 = load i3, i3* @fpu_stat_TOP + %4 = call x86_fp80 @__frontend_reg_load.fpr(i3 %3) + ret void + })"); + + setX86Environment("32", "cdecl"); + bool b = pass.runOnModuleCustom(*module, &config, abi); + + std::string exp = PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @foo() { + bb: + %0 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st0 + %1 = sub i3 %0, 1 + store i3 %1, i3* @fpu_stat_TOP + %2 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st7 + ret void + } + define void @boo() { + bb: + call void @foo() + %0 = load i3, i3* @fpu_stat_TOP + %1 = load x86_fp80, x86_fp80* @st7 + %2 = add i3 %0, 1 + store i3 %2, i3* @fpu_stat_TOP + %3 = load i3, i3* @fpu_stat_TOP + %4 = load x86_fp80, x86_fp80* @st0 + ret void + })"; + checkModuleAgainstExpectedIr(exp); + EXPECT_TRUE(b); +} // x86_32bit_cdecl_call_of_analyzed_function_success + +TEST_F(X87FpuAnalysisTests, x86_32bit_cdecl_call_of_not_analyzed_function_success) +{ + parseInput(PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @boo() { + bb: + call void @foo() + %0 = load i3, i3* @fpu_stat_TOP + %1 = call x86_fp80 @__frontend_reg_load.fpr(i3 %0) + %2 = add i3 %0, 1 + store i3 %2, i3* @fpu_stat_TOP + %3 = load i3, i3* @fpu_stat_TOP + %4 = call x86_fp80 @__frontend_reg_load.fpr(i3 %3) + ret void + } + define void @foo() { + bb: + %0 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %0, x86_fp80 0xK3FFF8000000000000000) + %1 = sub i3 %0, 1 + store i3 %1, i3* @fpu_stat_TOP + %2 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %2, x86_fp80 0xK3FFF8000000000000000) + ret void + })"); + + setX86Environment("32", "cdecl"); + bool b = pass.runOnModuleCustom(*module, &config, abi); + + std::string exp = PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @boo() { + bb: + call void @foo() + %0 = load i3, i3* @fpu_stat_TOP + %1 = load x86_fp80, x86_fp80* @st7 + %2 = add i3 %0, 1 + store i3 %2, i3* @fpu_stat_TOP + %3 = load i3, i3* @fpu_stat_TOP + %4 = load x86_fp80, x86_fp80* @st0 + ret void + } + define void @foo() { + bb: + %0 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st0 + %1 = sub i3 %0, 1 + store i3 %1, i3* @fpu_stat_TOP + %2 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st7 + ret void + })"; + checkModuleAgainstExpectedIr(exp); + EXPECT_TRUE(b); +} // x86_32bit_cdecl_call_of_not_analyzed_function_success + + +// +// Architecture: 32bit +// Calling convention: stdcall +// Operation: Call function with floating-point arguments and return value. +// + +TEST_F(X87FpuAnalysisTests, x86_32bit_stdcall_call_of_analyzed_function_success) +{ + parseInput(PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @foo() { + bb: + %0 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %0, x86_fp80 0xK3FFF8000000000000000) + %1 = sub i3 %0, 1 + store i3 %1, i3* @fpu_stat_TOP + %2 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %2, x86_fp80 0xK3FFF8000000000000000) + %3 = sub i3 %2, 1 + store i3 %3, i3* @fpu_stat_TOP + %4 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %4, x86_fp80 0xK3FFF8000000000000000) + %5 = call x86_fp80 @__frontend_reg_load.fpr(i3 %4) + %6 = add i3 %4, 1 + store i3 %6, i3* @fpu_stat_TOP + %7 = load i3, i3* @fpu_stat_TOP + %8 = call x86_fp80 @__frontend_reg_load.fpr(i3 %7) + ret void + } + define void @boo() { + bb: + call void @foo() + %0 = load i3, i3* @fpu_stat_TOP + %1 = call x86_fp80 @__frontend_reg_load.fpr(i3 %0) + %2 = add i3 %0, 1 + store i3 %2, i3* @fpu_stat_TOP + %3 = load i3, i3* @fpu_stat_TOP + %4 = call x86_fp80 @__frontend_reg_load.fpr(i3 %3) + ret void + })"); + + setX86Environment("32", "stdcall"); + bool b = pass.runOnModuleCustom(*module, &config, abi); + + std::string exp = PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @foo() { + bb: + %0 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st0 + %1 = sub i3 %0, 1 + store i3 %1, i3* @fpu_stat_TOP + %2 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st7 + %3 = sub i3 %2, 1 + store i3 %3, i3* @fpu_stat_TOP + %4 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st6 + %5 = load x86_fp80, x86_fp80* @st6 + %6 = add i3 %4, 1 + store i3 %6, i3* @fpu_stat_TOP + %7 = load i3, i3* @fpu_stat_TOP + %8 = load x86_fp80, x86_fp80* @st7 + ret void + } + define void @boo() { + bb: + call void @foo() + %0 = load i3, i3* @fpu_stat_TOP + %1 = load x86_fp80, x86_fp80* @st7 + %2 = add i3 %0, 1 + store i3 %2, i3* @fpu_stat_TOP + %3 = load i3, i3* @fpu_stat_TOP + %4 = load x86_fp80, x86_fp80* @st0 + ret void + })"; + checkModuleAgainstExpectedIr(exp); + EXPECT_TRUE(b); +} // x86_32bit_stdcall_call_of_analyzed_function_success + +TEST_F(X87FpuAnalysisTests, x86_32bit_stdcall_call_of_not_analyzed_function_success) +{ + parseInput(PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @boo() { + bb: + call void @foo() + %0 = load i3, i3* @fpu_stat_TOP + %1 = call x86_fp80 @__frontend_reg_load.fpr(i3 %0) + %2 = add i3 %0, 1 + store i3 %2, i3* @fpu_stat_TOP + %3 = load i3, i3* @fpu_stat_TOP + %4 = call x86_fp80 @__frontend_reg_load.fpr(i3 %3) + ret void + } + define void @foo() { + bb: + %0 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %0, x86_fp80 0xK3FFF8000000000000000) + %1 = sub i3 %0, 1 + call void @__frontend_reg_store.fpr(i3 %1, x86_fp80 0xK3FFF8000000000000000) + %2 = sub i3 %0, 2 + call void @__frontend_reg_store.fpr(i3 %2, x86_fp80 0xK3FFF8000000000000000) + store i3 %1, i3* @fpu_stat_TOP + ret void + })"); + + setX86Environment("32", "stdcall"); + bool b = pass.runOnModuleCustom(*module, &config, abi); + + std::string exp = PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @boo() { + bb: + call void @foo() + %0 = load i3, i3* @fpu_stat_TOP + %1 = load x86_fp80, x86_fp80* @st7 + %2 = add i3 %0, 1 + store i3 %2, i3* @fpu_stat_TOP + %3 = load i3, i3* @fpu_stat_TOP + %4 = load x86_fp80, x86_fp80* @st0 + ret void + } + define void @foo() { + bb: + %0 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st0 + %1 = sub i3 %0, 1 + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st7 + %2 = sub i3 %0, 2 + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st6 + store i3 %1, i3* @fpu_stat_TOP + ret void + })"; + checkModuleAgainstExpectedIr(exp); + EXPECT_TRUE(b); +} // x86_32bit_stdcall_call_of_not_analyzed_function_success + +// +// Architecture: 32bit +// Calling convention: pascal +// Operation: Call function with floating-point arguments and return value. +// + +TEST_F(X87FpuAnalysisTests, x86_32bit_pascal_call_of_analyzed_function_success) +{ + parseInput(PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @foo() { + bb: + %0 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %0, x86_fp80 0xK3FFF8000000000000000) + %1 = sub i3 %0, 1 + call void @__frontend_reg_store.fpr(i3 %1, x86_fp80 0xK3FFF8000000000000000) + ret void + } + define void @boo() { + bb: + call void @foo() + %0 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %0, x86_fp80 0xK3FFF8000000000000000) + %1 = sub i3 %0, 1 + call void @__frontend_reg_store.fpr(i3 %1, x86_fp80 0xK3FFF8000000000000000) + ret void + })"); + + setX86Environment("32", "pascal"); + bool b = pass.runOnModuleCustom(*module, &config, abi); + + std::string exp = PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @foo() { + bb: + %0 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st0 + %1 = sub i3 %0, 1 + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st7 + ret void + } + define void @boo() { + bb: + call void @foo() + %0 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st0 + %1 = sub i3 %0, 1 + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st7 + ret void + })"; + checkModuleAgainstExpectedIr(exp); + EXPECT_TRUE(b); +} // x86_32bit_pascal_call_of_analyzed_function_success + +TEST_F(X87FpuAnalysisTests, x86_32bit_pascal_call_of_not_analyzed_function_success) +{ + parseInput(PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @boo() { + bb: + call void @foo() + %0 = load i3, i3* @fpu_stat_TOP + %1 = call x86_fp80 @__frontend_reg_load.fpr(i3 %0) + %2 = add i3 %0, 1 + %3 = call x86_fp80 @__frontend_reg_load.fpr(i3 %2) + store i3 %2, i3* @fpu_stat_TOP + ret void + } + define void @foo() { + bb: + %0 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %0, x86_fp80 0xK3FFF8000000000000000) + %1 = sub i3 %0, 1 + br i1 1, label %A, label %B + A: + %2 = sub i3 %1, 1 + call void @__frontend_reg_store.fpr(i3 %2, x86_fp80 0xK3FFF8000000000000000) + br label %C + B: + %3 = sub i3 %1, 2 + call void @__frontend_reg_store.fpr(i3 %3, x86_fp80 0xK3FFF8000000000000000) + br label %C + C: + store i3 %1, i3* @fpu_stat_TOP + ret void + })"); + + setX86Environment("32", "pascal"); + bool b = pass.runOnModuleCustom(*module, &config, abi); + + std::string exp = PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @boo() { + bb: + call void @foo() + %0 = load i3, i3* @fpu_stat_TOP + %1 = load x86_fp80, x86_fp80* @st7 + %2 = add i3 %0, 1 + %3 = load x86_fp80, x86_fp80* @st0 + store i3 %2, i3* @fpu_stat_TOP + ret void + } + define void @foo() { + bb: + %0 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st0 + %1 = sub i3 %0, 1 + br i1 true, label %A, label %B + A: + %2 = sub i3 %1, 1 + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st6 + br label %C + B: + %3 = sub i3 %1, 2 + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st5 + br label %C + C: + store i3 %1, i3* @fpu_stat_TOP + ret void + })"; + checkModuleAgainstExpectedIr(exp); + EXPECT_TRUE(b); +} // x86_32bit_pascal_call_of_not_analyzed_function_success + +// +// Architecture: 32bit +// Calling convention: fastcall +// Operation: Call function with floating-point arguments and return value. +// + +TEST_F(X87FpuAnalysisTests, x86_32bit_fastcall_call_of_analyzed_function_success) +{ + parseInput(PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @foo() { + bb: + %0 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %0, x86_fp80 0xK3FFF8000000000000000) + %1 = sub i3 %0, 2 + store i3 %1, i3* @fpu_stat_TOP + br i1 1, label %A, label %B + A: + %2 = load i3, i3* @fpu_stat_TOP + %3 = add i3 %2, 1 + call void @__frontend_reg_store.fpr(i3 %3, x86_fp80 0xK3FFF8000000000000000) + store i3 %3, i3* @fpu_stat_TOP + br label %C + B: + %4 = load i3, i3* @fpu_stat_TOP + %5 = add i3 %4, 1 + call void @__frontend_reg_store.fpr(i3 %5, x86_fp80 0xK3FFF8000000000000000) + store i3 %5, i3* @fpu_stat_TOP + br label %C + C: + ret void + } + define void @boo() { + bb: + call void @foo() + %0 = load i3, i3* @fpu_stat_TOP + %1 = call x86_fp80 @__frontend_reg_load.fpr(i3 %0) + %2 = add i3 %0, 1 + %3 = call x86_fp80 @__frontend_reg_load.fpr(i3 %2) + store i3 %2, i3* @fpu_stat_TOP + ret void + })"); + + setX86Environment("32", "fastcall"); + bool b = pass.runOnModuleCustom(*module, &config, abi); + + std::string exp = PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @foo() { + bb: + %0 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st0 + %1 = sub i3 %0, 2 + store i3 %1, i3* @fpu_stat_TOP + br i1 true, label %A, label %B + A: + %2 = load i3, i3* @fpu_stat_TOP + %3 = add i3 %2, 1 + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st7 + store i3 %3, i3* @fpu_stat_TOP + br label %C + B: + %4 = load i3, i3* @fpu_stat_TOP + %5 = add i3 %4, 1 + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st7 + store i3 %5, i3* @fpu_stat_TOP + br label %C + C: + ret void + } + define void @boo() { + bb: + call void @foo() + %0 = load i3, i3* @fpu_stat_TOP + %1 = load x86_fp80, x86_fp80* @st7 + %2 = add i3 %0, 1 + %3 = load x86_fp80, x86_fp80* @st0 + store i3 %2, i3* @fpu_stat_TOP + ret void + })"; + checkModuleAgainstExpectedIr(exp); + EXPECT_TRUE(b); +} // x86_32bit_fastcall_call_of_analyzed_function_success + +TEST_F(X87FpuAnalysisTests, x86_32bit_fastcall_call_of_not_analyzed_function_success) +{ + parseInput(PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @boo() { + bb: + call void @foo() + %0 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %0, x86_fp80 0xK3FFF8000000000000000) + ret void + } + define void @foo() { + bb: + %0 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %0, x86_fp80 0xK3FFF8000000000000000) + %1 = sub i3 %0, 2 + store i3 %1, i3* @fpu_stat_TOP + br i1 1, label %A, label %B + A: + %2 = load i3, i3* @fpu_stat_TOP + %3 = add i3 %2, 1 + call void @__frontend_reg_store.fpr(i3 %3, x86_fp80 0xK3FFF8000000000000000) + store i3 %3, i3* @fpu_stat_TOP + br label %C + B: + %4 = load i3, i3* @fpu_stat_TOP + %5 = add i3 %4, 1 + call void @__frontend_reg_store.fpr(i3 %5, x86_fp80 0xK3FFF8000000000000000) + store i3 %5, i3* @fpu_stat_TOP + br label %C + C: + %6 = load i3, i3* @fpu_stat_TOP + %7 = add i3 %6, 1 + call void @__frontend_reg_store.fpr(i3 %7, x86_fp80 0xK3FFF8000000000000000) + store i3 %7, i3* @fpu_stat_TOP + ret void + })"); + + setX86Environment("32", "fastcall"); + bool b = pass.runOnModuleCustom(*module, &config, abi); + + std::string exp = PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @boo() { + bb: + call void @foo() + %0 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st0 + ret void + } + define void @foo() { + bb: + %0 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st0 + %1 = sub i3 %0, 2 + store i3 %1, i3* @fpu_stat_TOP + br i1 true, label %A, label %B + A: + %2 = load i3, i3* @fpu_stat_TOP + %3 = add i3 %2, 1 + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st7 + store i3 %3, i3* @fpu_stat_TOP + br label %C + B: + %4 = load i3, i3* @fpu_stat_TOP + %5 = add i3 %4, 1 + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st7 + store i3 %5, i3* @fpu_stat_TOP + br label %C + C: + %6 = load i3, i3* @fpu_stat_TOP + %7 = add i3 %6, 1 + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st0 + store i3 %7, i3* @fpu_stat_TOP + ret void + })"; + checkModuleAgainstExpectedIr(exp); + EXPECT_TRUE(b); +} // x86_32bit_fastcall_call_of_not_analyzed_function_success + +// +// Architecture: 32bit +// Calling convention: thiscall +// Operation: Call function with floating-point arguments and return value. +// + +TEST_F(X87FpuAnalysisTests, x86_32bit_thiscall) +{ + parseInput(PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @foo() { + bb: + %0 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %0, x86_fp80 0xK3FFF8000000000000000) + %1 = sub i3 %0, 1 + call void @__frontend_reg_store.fpr(i3 %1, x86_fp80 0xK3FFF8000000000000000) + store i3 %1, i3* @fpu_stat_TOP + ret void + } + define void @boo() { + bb: + call void @foo() + %0 = load i3, i3* @fpu_stat_TOP + %1 = call x86_fp80 @__frontend_reg_load.fpr(i3 %0) + %2 = add i3 %0, 1 + %3 = call x86_fp80 @__frontend_reg_load.fpr(i3 %2) + store i3 %2, i3* @fpu_stat_TOP + ret void + })"); + + setX86Environment("32", "thiscall"); + bool b = pass.runOnModuleCustom(*module, &config, abi); + + std::string exp = PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @foo() { + bb: + %0 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st0 + %1 = sub i3 %0, 1 + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st7 + store i3 %1, i3* @fpu_stat_TOP + ret void + } + define void @boo() { + bb: + call void @foo() + %0 = load i3, i3* @fpu_stat_TOP + %1 = load x86_fp80, x86_fp80* @st7 + %2 = add i3 %0, 1 + %3 = load x86_fp80, x86_fp80* @st0 + store i3 %2, i3* @fpu_stat_TOP + ret void + })"; + checkModuleAgainstExpectedIr(exp); + EXPECT_TRUE(b); +} // x86_32bit_thiscall + +// +// Architecture: 32bit +// Calling convention: watcom +// Operation: Call function with floating-point arguments and return value. +// + +TEST_F(X87FpuAnalysisTests, x86_32bit_watcom) +{ + parseInput(PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @foo() { + bb: + %0 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %0, x86_fp80 0xK3FFF8000000000000000) + %1 = sub i3 %0, 3 + call void @__frontend_reg_store.fpr(i3 %1, x86_fp80 0xK3FFF8000000000000000) + ret void + } + define void @boo() { + bb: + call void @foo() + %0 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %0, x86_fp80 0xK3FFF8000000000000000) + %1 = add i3 %0, 2 + %2 = call x86_fp80 @__frontend_reg_load.fpr(i3 %1) + ret void + })"); + + setX86Environment("32", "watcom"); + bool b = pass.runOnModuleCustom(*module, &config, abi); + + std::string exp = PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @foo() { + bb: + %0 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st0 + %1 = sub i3 %0, 3 + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st5 + ret void + } + define void @boo() { + bb: + call void @foo() + %0 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st0 + %1 = add i3 %0, 2 + %2 = load x86_fp80, x86_fp80* @st2 + ret void + })"; + checkModuleAgainstExpectedIr(exp); + EXPECT_TRUE(b); +} // x86_32bit_watcom + +// +// Architecture: 32bit +// Calling convention: unknown +// Operation: Call function without floating-point arguments and return value. +// + +TEST_F(X87FpuAnalysisTests, x86_32bit_analyze_not_FP_return_success) +{ + parseInput(PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @foo() { + bb: + %0 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %0, x86_fp80 0xK3FFF8000000000000000) + %1 = sub i3 %0, 1 + store i3 %1, i3* @fpu_stat_TOP + %2 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %2, x86_fp80 0xK3FFF8000000000000000) + %3 = call x86_fp80 @__frontend_reg_load.fpr(i3 %2) + %4 = add i3 %2, 1 + store i3 %4, i3* @fpu_stat_TOP + %5 = load i3, i3* @fpu_stat_TOP + %6 = call x86_fp80 @__frontend_reg_load.fpr(i3 %5) + ret void + } + define void @boo() { + bb: + call void @foo() + ret void + })"); + + setX86Environment("32", "unknown"); + bool b = pass.runOnModuleCustom(*module, &config, abi); + + std::string exp = PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @foo() { + bb: + %0 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st0 + %1 = sub i3 %0, 1 + store i3 %1, i3* @fpu_stat_TOP + %2 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st7 + %3 = load x86_fp80, x86_fp80* @st7 + %4 = add i3 %2, 1 + store i3 %4, i3* @fpu_stat_TOP + %5 = load i3, i3* @fpu_stat_TOP + %6 = load x86_fp80, x86_fp80* @st0 + ret void + } + define void @boo() { + bb: + call void @foo() + ret void + })"; + checkModuleAgainstExpectedIr(exp); + EXPECT_TRUE(b); +} // x86_32bit_analyze_not_FP_return_success + +// +// Architecture: 64bit +// Calling convention: x64 windows, linux, bsd, mac +// Operation: Call function with floating-point arguments and return value. +// + +TEST_F(X87FpuAnalysisTests, x86_64bit_call_of_analyzed_function_success) +{ + parseInput(PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @foo() { + bb: + %0 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %0, x86_fp80 0xK3FFF8000000000000000) + %1 = sub i3 %0, 1 + store i3 %1, i3* @fpu_stat_TOP + %2 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %2, x86_fp80 0xK3FFF8000000000000000) + %3 = call x86_fp80 @__frontend_reg_load.fpr(i3 %2) + %4 = add i3 %2, 1 + store i3 %4, i3* @fpu_stat_TOP + %5 = load i3, i3* @fpu_stat_TOP + %6 = call x86_fp80 @__frontend_reg_load.fpr(i3 %5); this val will be saved to xmm0 + ret void + } + define void @boo() { + bb: + call void @foo() + ret void + })"); + + setX86Environment("64", "unknown"); + bool b = pass.runOnModuleCustom(*module, &config, abi); + + std::string exp = PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @foo() { + bb: + %0 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st0 + %1 = sub i3 %0, 1 + store i3 %1, i3* @fpu_stat_TOP + %2 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st7 + %3 = load x86_fp80, x86_fp80* @st7 + %4 = add i3 %2, 1 + store i3 %4, i3* @fpu_stat_TOP + %5 = load i3, i3* @fpu_stat_TOP + %6 = load x86_fp80, x86_fp80* @st0 + ret void + } + define void @boo() { + bb: + call void @foo() + ret void + })"; + checkModuleAgainstExpectedIr(exp); + EXPECT_TRUE(b); +} // x86_64bit_call_of_analyzed_function_success + +TEST_F(X87FpuAnalysisTests, x86_64bit_call_of_not_analyzed_function_success) +{ + parseInput(PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @boo() { + bb: + call void @foo() + ret void + } + define void @foo() { + bb: + %0 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %0, x86_fp80 0xK3FFF8000000000000000) + %1 = sub i3 %0, 1 + store i3 %1, i3* @fpu_stat_TOP + %2 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %2, x86_fp80 0xK3FFF8000000000000000) + %3 = call x86_fp80 @__frontend_reg_load.fpr(i3 %2); + %4 = add i3 %2, 1 + store i3 %4, i3* @fpu_stat_TOP + %5 = load i3, i3* @fpu_stat_TOP + %6 = call x86_fp80 @__frontend_reg_load.fpr(i3 %5); this val will be saved to xmm0 + ret void + })"); + + setX86Environment("64", "unknown"); + bool b = pass.runOnModuleCustom(*module, &config, abi); + + std::string exp = PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @boo() { + bb: + call void @foo() + ret void + } + define void @foo() { + bb: + %0 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st0 + %1 = sub i3 %0, 1 + store i3 %1, i3* @fpu_stat_TOP + %2 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st7 + %3 = load x86_fp80, x86_fp80* @st7 + %4 = add i3 %2, 1 + store i3 %4, i3* @fpu_stat_TOP + %5 = load i3, i3* @fpu_stat_TOP + %6 = load x86_fp80, x86_fp80* @st0 + ret void + })"; + checkModuleAgainstExpectedIr(exp); + EXPECT_TRUE(b); +} // x86_64bit_call_of_not_analyzed_function_success + +// +// BRANCH AND LOOPS +// + +TEST_F(X87FpuAnalysisTests, if_branch_or_loop) +{ + parseInput(PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @foo() { + bb: + %0 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %0, x86_fp80 0xK3FFF8000000000000000) + %1 = sub i3 %0, 1 + store i3 %1, i3* @fpu_stat_TOP + %2 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %2, x86_fp80 0xK3FFF8000000000000000) + br i1 1, label %dec_label_if_true, label %dec_label_end_branch + dec_label_if_true: + %3 = load i3, i3* @fpu_stat_TOP + %4 = call x86_fp80 @__frontend_reg_load.fpr(i3 %3); + %5 = sub i3 %3, 1 + store i3 %5, i3* @fpu_stat_TOP + %6 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %6, x86_fp80 0xK3FFF8000000000000000) + %7 = call x86_fp80 @__frontend_reg_load.fpr(i3 %6); + %8 = add i3 %6, 1 + store i3 %8, i3* @fpu_stat_TOP + br label %dec_label_end_branch + dec_label_end_branch: + %9 = load i3, i3* @fpu_stat_TOP + %10 = call x86_fp80 @__frontend_reg_load.fpr(i3 %9); + %11 = add i3 %9, 1 + store i3 %11, i3* @fpu_stat_TOP + %12 = load i3, i3* @fpu_stat_TOP + %13 = call x86_fp80 @__frontend_reg_load.fpr(i3 %12); + ret void + })"); + + setX86Environment("64", "unknown"); + bool b = pass.runOnModuleCustom(*module, &config, abi); + + std::string exp = PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @foo() { + bb: + %0 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st0 + %1 = sub i3 %0, 1 + store i3 %1, i3* @fpu_stat_TOP + %2 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st7 + br i1 true, label %dec_label_if_true, label %dec_label_end_branch + dec_label_if_true: + %3 = load i3, i3* @fpu_stat_TOP + %4 = load x86_fp80, x86_fp80* @st7 + %5 = sub i3 %3, 1 + store i3 %5, i3* @fpu_stat_TOP + %6 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st6 + %7 = load x86_fp80, x86_fp80* @st6 + %8 = add i3 %6, 1 + store i3 %8, i3* @fpu_stat_TOP + br label %dec_label_end_branch + dec_label_end_branch: + %9 = load i3, i3* @fpu_stat_TOP + %10 = load x86_fp80, x86_fp80* @st7 + %11 = add i3 %9, 1 + store i3 %11, i3* @fpu_stat_TOP + %12 = load i3, i3* @fpu_stat_TOP + %13 = load x86_fp80, x86_fp80* @st0 + ret void +})"; + checkModuleAgainstExpectedIr(exp); + EXPECT_TRUE(b); +} // if_branch + +TEST_F(X87FpuAnalysisTests, if_else_branch) +{ + parseInput(PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @foo() { + bb: + %0 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %0, x86_fp80 0xK3FFF8000000000000000) + %1 = sub i3 %0, 1 + store i3 %1, i3* @fpu_stat_TOP + %2 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %2, x86_fp80 0xK3FFF8000000000000000) + br i1 1, label %dec_label_if_true, label %dec_label_if_false + dec_label_if_true: + %3 = load i3, i3* @fpu_stat_TOP + %4 = call x86_fp80 @__frontend_reg_load.fpr(i3 %3); + %5 = sub i3 %3, 1 + store i3 %5, i3* @fpu_stat_TOP + %6 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %6, x86_fp80 0xK3FFF8000000000000000) + %7 = call x86_fp80 @__frontend_reg_load.fpr(i3 %6); + %8 = add i3 %6, 1 + store i3 %8, i3* @fpu_stat_TOP + br label %dec_label_end_branch + dec_label_if_false: + %9 = load i3, i3* @fpu_stat_TOP + %10 = call x86_fp80 @__frontend_reg_load.fpr(i3 %9); + %11 = sub i3 %9, 1 + store i3 %11, i3* @fpu_stat_TOP + %12 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %12, x86_fp80 0xK3FFF8000000000000000) + %13 = call x86_fp80 @__frontend_reg_load.fpr(i3 %12); + %14 = add i3 %12, 1 + store i3 %14, i3* @fpu_stat_TOP + br label %dec_label_end_branch + dec_label_end_branch: + %15 = load i3, i3* @fpu_stat_TOP + %16 = call x86_fp80 @__frontend_reg_load.fpr(i3 %15); + %17 = add i3 %15, 1 + store i3 %17, i3* @fpu_stat_TOP + %18 = load i3, i3* @fpu_stat_TOP + %19 = call x86_fp80 @__frontend_reg_load.fpr(i3 %18); + ret void + } +)"); + + setX86Environment("64", "unknown"); + bool b = pass.runOnModuleCustom(*module, &config, abi); + + std::string exp = PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @foo() { + bb: + %0 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st0 + %1 = sub i3 %0, 1 + store i3 %1, i3* @fpu_stat_TOP + %2 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st7 + br i1 true, label %dec_label_if_true, label %dec_label_if_false + dec_label_if_true: + %3 = load i3, i3* @fpu_stat_TOP + %4 = load x86_fp80, x86_fp80* @st7 + %5 = sub i3 %3, 1 + store i3 %5, i3* @fpu_stat_TOP + %6 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st6 + %7 = load x86_fp80, x86_fp80* @st6 + %8 = add i3 %6, 1 + store i3 %8, i3* @fpu_stat_TOP + br label %dec_label_end_branch + dec_label_if_false: + %9 = load i3, i3* @fpu_stat_TOP + %10 = load x86_fp80, x86_fp80* @st7 + %11 = sub i3 %9, 1 + store i3 %11, i3* @fpu_stat_TOP + %12 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st6 + %13 = load x86_fp80, x86_fp80* @st6 + %14 = add i3 %12, 1 + store i3 %14, i3* @fpu_stat_TOP + br label %dec_label_end_branch + dec_label_end_branch: + %15 = load i3, i3* @fpu_stat_TOP + %16 = load x86_fp80, x86_fp80* @st7 + %17 = add i3 %15, 1 + store i3 %17, i3* @fpu_stat_TOP + %18 = load i3, i3* @fpu_stat_TOP + %19 = load x86_fp80, x86_fp80* @st0 + ret void +})"; + checkModuleAgainstExpectedIr(exp); + EXPECT_TRUE(b); +} // if_else_branch + +TEST_F(X87FpuAnalysisTests, if_elseif_else_branch_or_switch) +{ + parseInput(PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @foo() { + bb: + %0 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %0, x86_fp80 0xK3FFF8000000000000000) + %1 = sub i3 %0, 1 + store i3 %1, i3* @fpu_stat_TOP + %2 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %2, x86_fp80 0xK3FFF8000000000000000) + br i1 1, label %dec_label_if_then_true, label %dec_label_if_then_false + dec_label_if_then_true: + %3 = load i3, i3* @fpu_stat_TOP + %4 = call x86_fp80 @__frontend_reg_load.fpr(i3 %3); + %5 = sub i3 %3, 1 + store i3 %5, i3* @fpu_stat_TOP + %6 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %6, x86_fp80 0xK3FFF8000000000000000) + %7 = call x86_fp80 @__frontend_reg_load.fpr(i3 %6); + %8 = add i3 %6, 1 + store i3 %8, i3* @fpu_stat_TOP + br label %dec_label_end_branch + dec_label_if_then_false: + br i1 1, label %dec_label_else_if_true, label %dec_label_else_if_false + dec_label_else_if_true: + %9 = load i3, i3* @fpu_stat_TOP + %10 = call x86_fp80 @__frontend_reg_load.fpr(i3 %9); + %11 = sub i3 %9, 1 + store i3 %11, i3* @fpu_stat_TOP + %12 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %12, x86_fp80 0xK3FFF8000000000000000) + %13 = call x86_fp80 @__frontend_reg_load.fpr(i3 %12); + %14 = add i3 %12, 1 + store i3 %14, i3* @fpu_stat_TOP + br label %dec_label_end_branch + dec_label_else_if_false: + br label %dec_label_end_branch + dec_label_end_branch: + %15 = load i3, i3* @fpu_stat_TOP + %16 = call x86_fp80 @__frontend_reg_load.fpr(i3 %15); + %17 = add i3 %15, 1 + store i3 %17, i3* @fpu_stat_TOP + %18 = load i3, i3* @fpu_stat_TOP + %19 = call x86_fp80 @__frontend_reg_load.fpr(i3 %18); + ret void + } +)"); + + setX86Environment("64", "unknown"); + bool b = pass.runOnModuleCustom(*module, &config, abi); + + std::string exp = PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @foo() { + bb: + %0 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st0 + %1 = sub i3 %0, 1 + store i3 %1, i3* @fpu_stat_TOP + %2 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st7 + br i1 true, label %dec_label_if_then_true, label %dec_label_if_then_false + dec_label_if_then_true: + %3 = load i3, i3* @fpu_stat_TOP + %4 = load x86_fp80, x86_fp80* @st7 + %5 = sub i3 %3, 1 + store i3 %5, i3* @fpu_stat_TOP + %6 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st6 + %7 = load x86_fp80, x86_fp80* @st6 + %8 = add i3 %6, 1 + store i3 %8, i3* @fpu_stat_TOP + br label %dec_label_end_branch + dec_label_if_then_false: + br i1 true, label %dec_label_else_if_true, label %dec_label_else_if_false + dec_label_else_if_true: + %9 = load i3, i3* @fpu_stat_TOP + %10 = load x86_fp80, x86_fp80* @st7 + %11 = sub i3 %9, 1 + store i3 %11, i3* @fpu_stat_TOP + %12 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st6 + %13 = load x86_fp80, x86_fp80* @st6 + %14 = add i3 %12, 1 + store i3 %14, i3* @fpu_stat_TOP + br label %dec_label_end_branch + dec_label_else_if_false: + br label %dec_label_end_branch + dec_label_end_branch: + %15 = load i3, i3* @fpu_stat_TOP + %16 = load x86_fp80, x86_fp80* @st7 + %17 = add i3 %15, 1 + store i3 %17, i3* @fpu_stat_TOP + %18 = load i3, i3* @fpu_stat_TOP + %19 = load x86_fp80, x86_fp80* @st0 + ret void + } +)"; + checkModuleAgainstExpectedIr(exp); + EXPECT_TRUE(b); +} // if_elseif_else_branch + +TEST_F(X87FpuAnalysisTests, nested_branch_0) +{ + parseInput(PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @foo() { + A: + br i1 1, label %B, label %C + B: + %0 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %0, x86_fp80 0xK3FFF8000000000000000) + %1 = sub i3 %0, 1 + store i3 %1, i3* @fpu_stat_TOP + %2 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %2, x86_fp80 0xK3FFF8000000000000000) + br i1 1, label %D, label %E + D: + %3 = load i3, i3* @fpu_stat_TOP + %4 = call x86_fp80 @__frontend_reg_load.fpr(i3 %3) + br label %E + E: + %5 = load i3, i3* @fpu_stat_TOP + %6 = add i3 %5, 1 + store i3 %6, i3* @fpu_stat_TOP + %7 = load i3, i3* @fpu_stat_TOP + %8 = call x86_fp80 @__frontend_reg_load.fpr(i3 %7) + br label %C + C: + ret void + } +)"); + + setX86Environment("64", "unknown"); + bool b = pass.runOnModuleCustom(*module, &config, abi); + + std::string exp = PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @foo() { + A: + br i1 true, label %B, label %C + B: + %0 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st0 + %1 = sub i3 %0, 1 + store i3 %1, i3* @fpu_stat_TOP + %2 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st7 + br i1 true, label %D, label %E + D: + %3 = load i3, i3* @fpu_stat_TOP + %4 = load x86_fp80, x86_fp80* @st7 + br label %E + E: + %5 = load i3, i3* @fpu_stat_TOP + %6 = add i3 %5, 1 + store i3 %6, i3* @fpu_stat_TOP + %7 = load i3, i3* @fpu_stat_TOP + %8 = load x86_fp80, x86_fp80* @st0 + br label %C + C: + ret void + } +)"; + checkModuleAgainstExpectedIr(exp); + EXPECT_TRUE(b); +} // nested_branch_0 + +TEST_F(X87FpuAnalysisTests, nested_branch_1) +{ + parseInput(PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @foo() { + A: + br i1 1, label %B, label %C + B: + %0 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %0, x86_fp80 0xK3FFF8000000000000000) + %1 = sub i3 %0, 1 + store i3 %1, i3* @fpu_stat_TOP + %2 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %2, x86_fp80 0xK3FFF8000000000000000) + %3 = sub i3 %2, 1 + store i3 %3, i3* @fpu_stat_TOP + %4 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %4, x86_fp80 0xK3FFF8000000000000000) + %5 = sub i3 %4, 1 + store i3 %5, i3* @fpu_stat_TOP + %6 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %6, x86_fp80 0xK3FFF8000000000000000) + br i1 1, label %D, label %E + D: + %7 = load i3, i3* @fpu_stat_TOP + %8 = call x86_fp80 @__frontend_reg_load.fpr(i3 %7) + br label %E + E: + %9 = load i3, i3* @fpu_stat_TOP + %10 = call x86_fp80 @__frontend_reg_load.fpr(i3 %9) + %11 = add i3 %9, 1 + store i3 %11, i3* @fpu_stat_TOP + %12 = load i3, i3* @fpu_stat_TOP + %13 = add i3 %12, 1 + %14 = add i3 %13, 1 + store i3 %14, i3* @fpu_stat_TOP + %15 = load i3, i3* @fpu_stat_TOP + %16 = call x86_fp80 @__frontend_reg_load.fpr(i3 %15) + br label %C + C: + ret void + } +)"); + + setX86Environment("64", "unknown"); + bool b = pass.runOnModuleCustom(*module, &config, abi); + + std::string exp = PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @foo() { + A: + br i1 true, label %B, label %C + B: + %0 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st0 + %1 = sub i3 %0, 1 + store i3 %1, i3* @fpu_stat_TOP + %2 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st7 + %3 = sub i3 %2, 1 + store i3 %3, i3* @fpu_stat_TOP + %4 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st6 + %5 = sub i3 %4, 1 + store i3 %5, i3* @fpu_stat_TOP + %6 = load i3, i3* @fpu_stat_TOP + store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st5 + br i1 true, label %D, label %E + D: + %7 = load i3, i3* @fpu_stat_TOP + %8 = load x86_fp80, x86_fp80* @st5 + br label %E + E: + %9 = load i3, i3* @fpu_stat_TOP + %10 = load x86_fp80, x86_fp80* @st5 + %11 = add i3 %9, 1 + store i3 %11, i3* @fpu_stat_TOP + %12 = load i3, i3* @fpu_stat_TOP + %13 = add i3 %12, 1 + %14 = add i3 %13, 1 + store i3 %14, i3* @fpu_stat_TOP + %15 = load i3, i3* @fpu_stat_TOP + %16 = load x86_fp80, x86_fp80* @st0 + br label %C + C: + ret void + } +)"; + checkModuleAgainstExpectedIr(exp); + EXPECT_TRUE(b); +} // nested_branch_1 + +TEST_F(X87FpuAnalysisTests, if_else_branch_fail) +{ + parseInput(PREDEFINED_REGISTERS_AND_FUNCTIONS + R"( + define void @foo() { + bb: + br i1 1, label %dec_label_if_true, label %dec_label_if_false + dec_label_if_true: + %0 = load i3, i3* @fpu_stat_TOP + %1 = sub i3 %0, 1 + store i3 %1, i3* @fpu_stat_TOP + %2 = load i3, i3* @fpu_stat_TOP + call void @__frontend_reg_store.fpr(i3 %2, x86_fp80 0xK3FFF8000000000000000) + br label %dec_label_end_branch + dec_label_if_false: + %3 = load i3, i3* @fpu_stat_TOP + %4 = add i3 %3, 1 + store i3 %4, i3* @fpu_stat_TOP + br label %dec_label_end_branch + dec_label_end_branch: + ret void + } +)"); + + setX86Environment("64", "unknown"); + bool b = pass.runOnModuleCustom(*module, &config, abi); + + EXPECT_FALSE(b); +} // if_else_branch_fail + +} // namespace tests +} // namespace bin2llvmir +} // namespace retdec