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Replace explicit GTF_UNSIGNED flag operations with GenTree helper methods #123265

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Merged
EgorBo merged 10 commits into from
Jan 24, 2026
Merged

Replace explicit GTF_UNSIGNED flag operations with GenTree helper methods #123265

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6373612
Initial plan
Copilot Jan 16, 2026
8fdc30f
Replace explicit GTF_UNSIGNED flag operations with GenTree methods
Copilot Jan 16, 2026
a9cdd31
Fix assertion in SetUnsigned/ClearUnsigned methods
Copilot Jan 16, 2026
6ef0c6d
Update gentree.h
EgorBo Jan 21, 2026
6331512
Move SetUnsigned/ClearUnsigned to gentree.cpp with enhanced assertions
Copilot Jan 22, 2026
52065ef
Update gentree.cpp
EgorBo Jan 22, 2026
b619f3b
Update gentree.cpp
EgorBo Jan 22, 2026
05a3420
Update gentree.cpp
EgorBo Jan 22, 2026
7aa31bf
Update gentree.h
EgorBo Jan 22, 2026
8c6d438
Update gentree.h
EgorBo Jan 23, 2026
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4 changes: 2 additions & 2 deletions src/coreclr/jit/codegenarm.cpp
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Expand Up @@ -1429,7 +1429,7 @@ void CodeGen::genLongToIntCast(GenTree* cast)

genConsumeRegs(src);

var_types srcType = ((cast->gtFlags & GTF_UNSIGNED) != 0) ? TYP_ULONG : TYP_LONG;
var_types srcType = cast->IsUnsigned() ? TYP_ULONG : TYP_LONG;
var_types dstType = cast->CastToType();
regNumber loSrcReg = src->gtGetOp1()->GetRegNum();
regNumber hiSrcReg = src->gtGetOp2()->GetRegNum();
Expand Down Expand Up @@ -1520,7 +1520,7 @@ void CodeGen::genIntToFloatCast(GenTree* treeNode)
assert(!varTypeIsFloating(srcType) && varTypeIsFloating(dstType));

// force the srcType to unsigned if GT_UNSIGNED flag is set
if (treeNode->gtFlags & GTF_UNSIGNED)
if (treeNode->IsUnsigned())
{
srcType = varTypeToUnsigned(srcType);
}
Expand Down
4 changes: 2 additions & 2 deletions src/coreclr/jit/codegenarm64.cpp
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Expand Up @@ -2431,7 +2431,7 @@ void CodeGen::genCodeForMulHi(GenTreeOp* treeNode)
var_types targetType = treeNode->TypeGet();
emitter* emit = GetEmitter();
emitAttr attr = emitActualTypeSize(treeNode);
unsigned isUnsigned = (treeNode->gtFlags & GTF_UNSIGNED);
unsigned isUnsigned = treeNode->IsUnsigned();

GenTree* op1 = treeNode->gtGetOp1();
GenTree* op2 = treeNode->gtGetOp2();
Expand Down Expand Up @@ -4387,7 +4387,7 @@ void CodeGen::genIntToFloatCast(GenTree* treeNode)
assert(!varTypeIsFloating(srcType) && varTypeIsFloating(dstType));

// force the srcType to unsigned if GT_UNSIGNED flag is set
if (treeNode->gtFlags & GTF_UNSIGNED)
if (treeNode->IsUnsigned())
{
srcType = varTypeToUnsigned(srcType);
}
Expand Down
2 changes: 1 addition & 1 deletion src/coreclr/jit/codegencommon.cpp
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Expand Up @@ -1730,7 +1730,7 @@ void CodeGen::genCheckOverflow(GenTree* tree)
else
#endif
{
bool isUnsignedOverflow = ((tree->gtFlags & GTF_UNSIGNED) != 0);
bool isUnsignedOverflow = tree->IsUnsigned();

#if defined(TARGET_XARCH)

Expand Down
6 changes: 3 additions & 3 deletions src/coreclr/jit/codegenloongarch64.cpp
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Expand Up @@ -1065,7 +1065,7 @@ void CodeGen::genCodeForMulHi(GenTreeOp* treeNode)
var_types targetType = treeNode->TypeGet();
emitter* emit = GetEmitter();
emitAttr attr = emitActualTypeSize(treeNode);
unsigned isUnsigned = (treeNode->gtFlags & GTF_UNSIGNED);
unsigned isUnsigned = treeNode->IsUnsigned();

GenTree* op1 = treeNode->gtGetOp1();
GenTree* op2 = treeNode->gtGetOp2();
Expand Down Expand Up @@ -2874,7 +2874,7 @@ void CodeGen::genIntToFloatCast(GenTree* treeNode)
emitAttr srcSize = EA_ATTR(genTypeSize(srcType));
noway_assert((srcSize == EA_4BYTE) || (srcSize == EA_8BYTE));

bool IsUnsigned = treeNode->gtFlags & GTF_UNSIGNED;
bool IsUnsigned = treeNode->IsUnsigned();
instruction ins = INS_invalid;

genConsumeOperands(treeNode->AsOp());
Expand Down Expand Up @@ -3270,7 +3270,7 @@ void CodeGen::genCodeForCompare(GenTreeOp* tree)
assert(!op1->isContainedIntOrIImmed());
assert(tree->OperIs(GT_LT, GT_LE, GT_EQ, GT_NE, GT_GT, GT_GE));

bool IsUnsigned = (tree->gtFlags & GTF_UNSIGNED) != 0;
bool IsUnsigned = tree->IsUnsigned();
regNumber regOp1 = op1->GetRegNum();

if (op2->isContainedIntOrIImmed())
Expand Down
4 changes: 2 additions & 2 deletions src/coreclr/jit/codegenriscv64.cpp
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Expand Up @@ -1053,7 +1053,7 @@ void CodeGen::genCodeForMulHi(GenTreeOp* treeNode)
var_types targetType = treeNode->TypeGet();
emitter* emit = GetEmitter();
emitAttr attr = emitActualTypeSize(treeNode);
unsigned isUnsigned = (treeNode->gtFlags & GTF_UNSIGNED);
unsigned isUnsigned = treeNode->IsUnsigned();

GenTree* op1 = treeNode->gtGetOp1();
GenTree* op2 = treeNode->gtGetOp2();
Expand Down Expand Up @@ -2941,7 +2941,7 @@ void CodeGen::genIntToFloatCast(GenTree* treeNode)
emitAttr srcSize = EA_ATTR(genTypeSize(srcType));
noway_assert((srcSize == EA_4BYTE) || (srcSize == EA_8BYTE));

bool isUnsigned = treeNode->gtFlags & GTF_UNSIGNED;
bool isUnsigned = treeNode->IsUnsigned();
instruction ins = INS_invalid;

if (isUnsigned)
Expand Down
6 changes: 3 additions & 3 deletions src/coreclr/jit/codegenxarch.cpp
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Expand Up @@ -1125,7 +1125,7 @@ void CodeGen::genCodeForMul(GenTreeOp* treeNode)

instruction ins;
emitAttr size = emitTypeSize(treeNode);
bool isUnsignedMultiply = ((treeNode->gtFlags & GTF_UNSIGNED) != 0);
bool isUnsignedMultiply = treeNode->IsUnsigned();
bool requiresOverflowCheck = treeNode->gtOverflowEx();

GenTree* op1 = treeNode->gtGetOp1();
Expand Down Expand Up @@ -6657,7 +6657,7 @@ void CodeGen::genCompareInt(GenTreeOp* treeNode)
// The common type cannot be smaller than any of the operand types, we're probably mixing int/long
assert(genTypeSize(type) >= max(genTypeSize(op1Type), genTypeSize(op2Type)));
// Small unsigned int types (TYP_BOOL can use anything) should use unsigned comparisons
assert(!(varTypeIsSmall(type) && varTypeIsUnsigned(type)) || ((tree->gtFlags & GTF_UNSIGNED) != 0));
assert(!(varTypeIsSmall(type) && varTypeIsUnsigned(type)) || tree->IsUnsigned());
// If op1 is smaller then it cannot be in memory, we're probably missing a cast
assert((genTypeSize(op1Type) >= genTypeSize(type)) || !op1->isUsedFromMemory());
// If op2 is smaller then it cannot be in memory, we're probably missing a cast
Expand Down Expand Up @@ -6819,7 +6819,7 @@ void CodeGen::genLongToIntCast(GenTree* cast)

genConsumeRegs(src);

var_types srcType = ((cast->gtFlags & GTF_UNSIGNED) != 0) ? TYP_ULONG : TYP_LONG;
var_types srcType = cast->IsUnsigned() ? TYP_ULONG : TYP_LONG;
var_types dstType = cast->CastToType();
regNumber loSrcReg = src->gtGetOp1()->GetRegNum();
regNumber hiSrcReg = src->gtGetOp2()->GetRegNum();
Expand Down
2 changes: 1 addition & 1 deletion src/coreclr/jit/compiler.cpp
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Expand Up @@ -9996,7 +9996,7 @@ JITDBGAPI void __cdecl cTreeFlags(Compiler* comp, GenTree* tree)
{
chars += printf("[DONT_CSE]");
}
if (tree->gtFlags & GTF_UNSIGNED)
if (tree->IsUnsigned())
{
chars += printf("[SMALL_UNSIGNED]");
}
Expand Down
4 changes: 2 additions & 2 deletions src/coreclr/jit/decomposelongs.cpp
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Expand Up @@ -1080,9 +1080,9 @@ GenTree* DecomposeLongs::DecomposeArith(LIR::Use& use)
hiResult->gtFlags |= GTF_OVERFLOW | GTF_EXCEPT;
loResult->gtFlags &= ~(GTF_OVERFLOW | GTF_EXCEPT);
}
if (loResult->gtFlags & GTF_UNSIGNED)
if (loResult->IsUnsigned())
{
hiResult->gtFlags |= GTF_UNSIGNED;
hiResult->SetUnsigned();
}
}

Expand Down
4 changes: 2 additions & 2 deletions src/coreclr/jit/emitarm.cpp
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Expand Up @@ -8178,7 +8178,7 @@ regNumber emitter::emitInsTernary(instruction ins, emitAttr attr, GenTree* dst,
regNumber extraReg = codeGen->internalRegisters.GetSingle(dst);
assert(extraReg != dst->GetRegNum());

if ((dst->gtFlags & GTF_UNSIGNED) != 0)
if (dst->IsUnsigned())
{
// Compute 8 byte result from 4 byte by 4 byte multiplication.
emitIns_R_R_R_R(INS_umull, EA_4BYTE, dst->GetRegNum(), extraReg, src1->GetRegNum(), src2->GetRegNum());
Expand Down Expand Up @@ -8214,7 +8214,7 @@ regNumber emitter::emitInsTernary(instruction ins, emitAttr attr, GenTree* dst,
}
else
{
bool isUnsignedOverflow = ((dst->gtFlags & GTF_UNSIGNED) != 0);
bool isUnsignedOverflow = dst->IsUnsigned();
jumpKind = isUnsignedOverflow ? EJ_lo : EJ_vs;
if (jumpKind == EJ_lo)
{
Expand Down
2 changes: 1 addition & 1 deletion src/coreclr/jit/emitarm64.cpp
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Expand Up @@ -14784,7 +14784,7 @@ regNumber emitter::emitInsTernary(instruction ins, emitAttr attr, GenTree* dst,
regNumber extraReg = codeGen->internalRegisters.GetSingle(dst);
assert(extraReg != dst->GetRegNum());

if ((dst->gtFlags & GTF_UNSIGNED) != 0)
if (dst->IsUnsigned())
{
if (attr == EA_4BYTE)
{
Expand Down
8 changes: 4 additions & 4 deletions src/coreclr/jit/emitloongarch64.cpp
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Expand Up @@ -4925,7 +4925,7 @@ regNumber emitter::emitInsTernary(instruction ins, emitAttr attr, GenTree* dst,
if (ins == INS_addi_d || ins == INS_addi_w)
{
// A = B + C
if ((dst->gtFlags & GTF_UNSIGNED) != 0)
if (dst->IsUnsigned())
{
codeGen->genJumpToThrowHlpBlk_la(SCK_OVERFLOW, INS_bltu, dst->GetRegNum(), nullptr, REG_R21);
}
Expand Down Expand Up @@ -4984,7 +4984,7 @@ regNumber emitter::emitInsTernary(instruction ins, emitAttr attr, GenTree* dst,
regNumber tmpReg1 = src1->GetRegNum();
regNumber tmpReg2 = src2->GetRegNum();

bool isUnsignd = (dst->gtFlags & GTF_UNSIGNED) != 0;
bool isUnsignd = dst->IsUnsigned();
instruction ins2;
if (attr == EA_8BYTE)
{
Expand Down Expand Up @@ -5083,7 +5083,7 @@ regNumber emitter::emitInsTernary(instruction ins, emitAttr attr, GenTree* dst,
}
}

if ((dst->gtFlags & GTF_UNSIGNED) == 0)
if (!dst->IsUnsigned())
{
saveOperReg2 = codeGen->internalRegisters.GetSingle(dst);
assert((saveOperReg2 != REG_RA) && (saveOperReg2 != REG_R21));
Expand All @@ -5105,7 +5105,7 @@ regNumber emitter::emitInsTernary(instruction ins, emitAttr attr, GenTree* dst,
{
// ADD : A = B + C
// SUB : A = B - C <=> B = A + C
if ((dst->gtFlags & GTF_UNSIGNED) != 0)
if (dst->IsUnsigned())
{
// ADD: if A < B, goto overflow
// SUB: if B < A, goto overflow
Expand Down
12 changes: 6 additions & 6 deletions src/coreclr/jit/emitriscv64.cpp
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Expand Up @@ -4849,7 +4849,7 @@ regNumber emitter::emitInsTernary(instruction ins, emitAttr attr, GenTree* dst,
assert(ins == INS_addi || ins == INS_addiw);

// AS11 = B + C
if ((dst->gtFlags & GTF_UNSIGNED) != 0)
if (dst->IsUnsigned())
{
codeGen->genJumpToThrowHlpBlk_la(SCK_OVERFLOW, INS_bltu, dstReg, nullptr, tempReg);
}
Expand Down Expand Up @@ -4892,7 +4892,7 @@ regNumber emitter::emitInsTernary(instruction ins, emitAttr attr, GenTree* dst,
{
case GT_MUL:
{
if (!needCheckOv && !(dst->gtFlags & GTF_UNSIGNED))
if (!needCheckOv && !dst->IsUnsigned())
{
emitIns_R_R_R(ins, attr, dstReg, src1Reg, src2Reg);
}
Expand All @@ -4908,7 +4908,7 @@ regNumber emitter::emitInsTernary(instruction ins, emitAttr attr, GenTree* dst,
assert(REG_RA != src1Reg);
assert(REG_RA != src2Reg);

if ((dst->gtFlags & GTF_UNSIGNED) != 0)
if (dst->IsUnsigned())
{
if (attr == EA_4BYTE)
{
Expand Down Expand Up @@ -4945,7 +4945,7 @@ regNumber emitter::emitInsTernary(instruction ins, emitAttr attr, GenTree* dst,
assert(tempReg != src1Reg);
assert(tempReg != src2Reg);

if ((dst->gtFlags & GTF_UNSIGNED) != 0)
if (dst->IsUnsigned())
{
codeGen->genJumpToThrowHlpBlk_la(SCK_OVERFLOW, INS_bne, tempReg);
}
Expand Down Expand Up @@ -4991,7 +4991,7 @@ regNumber emitter::emitInsTernary(instruction ins, emitAttr attr, GenTree* dst,
regNumber saveOperReg1 = REG_NA;
regNumber saveOperReg2 = REG_NA;

if ((dst->gtFlags & GTF_UNSIGNED) && (attr == EA_8BYTE))
if (dst->IsUnsigned() && (attr == EA_8BYTE))
{
if (src1->TypeIs(TYP_INT))
{
Expand Down Expand Up @@ -5071,7 +5071,7 @@ regNumber emitter::emitInsTernary(instruction ins, emitAttr attr, GenTree* dst,
regNumber branchReg1 = REG_NA;
regNumber branchReg2 = REG_NA;

if ((dst->gtFlags & GTF_UNSIGNED) != 0)
if (dst->IsUnsigned())
{
// if A < B then overflow
branchIns = INS_bltu;
Expand Down
4 changes: 2 additions & 2 deletions src/coreclr/jit/gentree.cpp
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Expand Up @@ -2666,7 +2666,7 @@ bool GenTree::Compare(GenTree* op1, GenTree* op2, bool swapOK)
}

/* Sensible flags must be equal */
if ((op1->gtFlags & (GTF_UNSIGNED)) != (op2->gtFlags & (GTF_UNSIGNED)))
if (op1->IsUnsigned() != op2->IsUnsigned())
{
return false;
}
Expand Down Expand Up @@ -12762,7 +12762,7 @@ void Compiler::gtDispTree(GenTree* tree,
var_types finalType = tree->TypeGet();

/* if GTF_UNSIGNED is set then force fromType to an unsigned type */
if (tree->gtFlags & GTF_UNSIGNED)
if (tree->IsUnsigned())
{
fromType = varTypeToUnsigned(fromType);
}
Expand Down
7 changes: 5 additions & 2 deletions src/coreclr/jit/gentree.h
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Expand Up @@ -2160,13 +2160,16 @@ struct GenTree

void SetUnsigned()
{
assert(OperIs(GT_ADD, GT_SUB, GT_CAST, GT_LE, GT_LT, GT_GT, GT_GE) || OperIsMul());
#if defined(TARGET_64BIT)
assert(OperIsCompare() || OperIsMul() || OperIs(GT_ADD, GT_SUB, GT_CAST));
#else
assert(OperIsCompare() || OperIsMul() || OperIs(GT_ADD, GT_SUB, GT_CAST, GT_ADD_HI, GT_SUB_HI));
#endif
gtFlags |= GTF_UNSIGNED;
}

void ClearUnsigned()
{
assert(OperIs(GT_ADD, GT_SUB, GT_CAST, GT_LE, GT_LT, GT_GT, GT_GE) || OperIsMul());
gtFlags &= ~GTF_UNSIGNED;
}

Expand Down
7 changes: 4 additions & 3 deletions src/coreclr/jit/importer.cpp
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Expand Up @@ -7507,7 +7507,7 @@ void Compiler::impImportBlockCode(BasicBlock* block)
op1->gtFlags |= (GTF_EXCEPT | GTF_OVERFLOW);
if (uns)
{
op1->gtFlags |= GTF_UNSIGNED;
op1->SetUnsigned();
}
}

Expand Down Expand Up @@ -7798,7 +7798,8 @@ void Compiler::impImportBlockCode(BasicBlock* block)
// TODO: setting both flags when only one is appropriate.
if (uns)
{
op1->gtFlags |= GTF_RELOP_NAN_UN | GTF_UNSIGNED;
op1->gtFlags |= GTF_RELOP_NAN_UN;
op1->SetUnsigned();
}

// Fold result, if possible.
Expand Down Expand Up @@ -7943,7 +7944,7 @@ void Compiler::impImportBlockCode(BasicBlock* block)

if (uns)
{
op1->gtFlags |= GTF_UNSIGNED;
op1->SetUnsigned();
}

if (unordered)
Expand Down
8 changes: 4 additions & 4 deletions src/coreclr/jit/importercalls.cpp
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Expand Up @@ -5494,7 +5494,7 @@ GenTree* Compiler::impSRCSUnsafeIntrinsic(NamedIntrinsic intrinsic,
GenTree* op1 = impPopStack().val;

GenTree* tmp = gtNewOperNode(GT_GT, TYP_INT, op1, op2);
tmp->gtFlags |= GTF_UNSIGNED;
tmp->SetUnsigned();
return gtFoldExpr(tmp);
}

Expand All @@ -5513,7 +5513,7 @@ GenTree* Compiler::impSRCSUnsafeIntrinsic(NamedIntrinsic intrinsic,
GenTree* op1 = impPopStack().val;

GenTree* tmp = gtNewOperNode(GT_GE, TYP_INT, op1, op2);
tmp->gtFlags |= GTF_UNSIGNED;
tmp->SetUnsigned();
return gtFoldExpr(tmp);
}

Expand All @@ -5530,7 +5530,7 @@ GenTree* Compiler::impSRCSUnsafeIntrinsic(NamedIntrinsic intrinsic,
GenTree* op1 = impPopStack().val;

GenTree* tmp = gtNewOperNode(GT_LT, TYP_INT, op1, op2);
tmp->gtFlags |= GTF_UNSIGNED;
tmp->SetUnsigned();
return gtFoldExpr(tmp);
}

Expand All @@ -5549,7 +5549,7 @@ GenTree* Compiler::impSRCSUnsafeIntrinsic(NamedIntrinsic intrinsic,
GenTree* op1 = impPopStack().val;

GenTree* tmp = gtNewOperNode(GT_LE, TYP_INT, op1, op2);
tmp->gtFlags |= GTF_UNSIGNED;
tmp->SetUnsigned();
return gtFoldExpr(tmp);
}

Expand Down
2 changes: 1 addition & 1 deletion src/coreclr/jit/loopcloning.cpp
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Expand Up @@ -253,7 +253,7 @@ GenTree* LC_Condition::ToGenTree(Compiler* comp, BasicBlock* bb, bool invert)

if (compareUnsigned)
{
result->gtFlags |= GTF_UNSIGNED;
result->SetUnsigned();
}

return result;
Expand Down
6 changes: 3 additions & 3 deletions src/coreclr/jit/lower.cpp
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Expand Up @@ -946,7 +946,7 @@ GenTree* Lowering::LowerSwitch(GenTree* node)

// Make sure we perform an unsigned comparison, just in case the switch index in 'temp'
// is now less than zero 0 (that would also hit the default case).
gtDefaultCaseCond->gtFlags |= GTF_UNSIGNED;
gtDefaultCaseCond->SetUnsigned();

GenTree* gtDefaultCaseJump = comp->gtNewOperNode(GT_JTRUE, TYP_VOID, gtDefaultCaseCond);
gtDefaultCaseJump->gtFlags = node->gtFlags;
Expand Down Expand Up @@ -4652,7 +4652,7 @@ GenTree* Lowering::LowerCompare(GenTree* cmp)
// has to generate a small comparison, it can still correctly generate a TYP_INT comparison.
//

cmp->gtFlags |= GTF_UNSIGNED;
cmp->SetUnsigned();
}
}
#elif defined(TARGET_RISCV64)
Expand Down Expand Up @@ -8060,7 +8060,7 @@ bool Lowering::LowerUnsignedDivOrMod(GenTreeOp* divMod)
((type == TYP_LONG) && (divisorValue > (UINT64_MAX / 2))))
{
divMod->ChangeOper(GT_GE);
divMod->gtFlags |= GTF_UNSIGNED;
divMod->SetUnsigned();
LowerNode(divMod);
return true;
}
Expand Down
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