Skip to content

Commit 192fe0f

Browse files
lixin5xintel-mediadev
lixin5x
authored and
intel-mediadev
committed
[CP] Init HuC interface cacheability
1. add init HuC interface cacheability in codechal hw 2. call InitMemoryObjectCacheSettings once from codechalhw constructor.
1 parent 16630ae commit 192fe0f

File tree

4 files changed

+123
-52
lines changed

4 files changed

+123
-52
lines changed

‎media_driver/agnostic/common/codec/hal/codechal_hw.cpp‎

Lines changed: 41 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -75,6 +75,8 @@ CodechalHwInterface::CodechalHwInterface(
7575
MOS_ZeroMemory(&m_dummyStreamIn, sizeof(m_dummyStreamIn));
7676
MOS_ZeroMemory(&m_dummyStreamOut, sizeof(m_dummyStreamOut));
7777
MOS_ZeroMemory(&m_conditionalBbEndDummy, sizeof(m_conditionalBbEndDummy));
78+
79+
InitMemoryObjectCacheSettings();
7880
}
7981

8082
CodechalHwInterface *CodechalHwInterface::Create(
@@ -143,6 +145,18 @@ MOS_STATUS CodechalHwInterface::InitCacheabilityControlSettings(
143145

144146
CODECHAL_HW_FUNCTION_ENTER;
145147

148+
CODECHAL_HW_CHK_STATUS_RETURN(InitMemoryObjectCacheSettings());
149+
CODECHAL_HW_CHK_STATUS_RETURN(InitL3CacheSettings());
150+
151+
return eStatus;
152+
}
153+
154+
MOS_STATUS CodechalHwInterface::InitMemoryObjectCacheSettings()
155+
{
156+
MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
157+
158+
CODECHAL_HW_FUNCTION_ENTER;
159+
146160
CODECHAL_HW_CHK_NULL_RETURN(m_osInterface);
147161

148162
for (uint32_t i = MOS_CODEC_RESOURCE_USAGE_BEGIN_CODEC + 1; i < MOS_CODEC_RESOURCE_USAGE_END_CODEC; i++)
@@ -153,6 +167,17 @@ MOS_STATUS CodechalHwInterface::InitCacheabilityControlSettings(
153167

154168
SetCacheabilitySettings(m_cacheabilitySettings);
155169

170+
return eStatus;
171+
}
172+
173+
MOS_STATUS CodechalHwInterface::InitL3CacheSettings()
174+
{
175+
MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
176+
177+
CODECHAL_HW_FUNCTION_ENTER;
178+
179+
CODECHAL_HW_CHK_NULL_RETURN(m_osInterface);
180+
156181
// This code needs to be removed
157182
PMHW_MEMORY_OBJECT_CONTROL_PARAMS cacheabilitySettings = &m_cacheabilitySettings[0];
158183
bool l3CachingEnabled = !m_osInterface->bSimIsActive;
@@ -177,29 +202,24 @@ MOS_STATUS CodechalHwInterface::InitCacheabilityControlSettings(
177202

178203
if (l3CachingEnabled)
179204
{
180-
InitL3CacheSettings();
181-
}
182-
183-
return eStatus;
184-
}
185-
186-
MOS_STATUS CodechalHwInterface::InitL3CacheSettings()
187-
{
188-
189-
// Get default L3 cache settings
190-
CODECHAL_HW_CHK_STATUS_RETURN(m_renderInterface->EnableL3Caching(nullptr));
205+
if (m_renderInterface)
206+
{
207+
// Get default L3 cache settings
208+
CODECHAL_HW_CHK_STATUS_RETURN(m_renderInterface->EnableL3Caching(nullptr));
191209

192210
#if (_DEBUG || _RELEASE_INTERNAL)
193-
// Override default L3 cache settings
194-
auto l3CacheConfig =
195-
m_renderInterface->GetL3CacheConfig();
196-
MHW_RENDER_ENGINE_L3_CACHE_SETTINGS l3Overrides;
197-
CODECHAL_HW_CHK_STATUS_RETURN(InitL3ControlUserFeatureSettings(
198-
l3CacheConfig,
199-
&l3Overrides));
200-
CODECHAL_HW_CHK_STATUS_RETURN(m_renderInterface->EnableL3Caching(
201-
&l3Overrides));
202-
#endif // (_DEBUG || _RELEASE_INTERNAL)
211+
// Override default L3 cache settings
212+
auto l3CacheConfig =
213+
m_renderInterface->GetL3CacheConfig();
214+
MHW_RENDER_ENGINE_L3_CACHE_SETTINGS l3Overrides;
215+
CODECHAL_HW_CHK_STATUS_RETURN(InitL3ControlUserFeatureSettings(
216+
l3CacheConfig,
217+
&l3Overrides));
218+
CODECHAL_HW_CHK_STATUS_RETURN(m_renderInterface->EnableL3Caching(
219+
&l3Overrides));
220+
#endif // (_DEBUG || _RELEASE_INTERNAL)
221+
}
222+
}
203223

204224
return MOS_STATUS_SUCCESS;
205225
}

‎media_driver/agnostic/common/codec/hal/codechal_hw.h‎

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -830,6 +830,15 @@ class CodechalHwInterface
830830
MOS_STATUS InitCacheabilityControlSettings(
831831
CODECHAL_FUNCTION codecFunction);
832832

833+
//!
834+
//! \brief Init MemoryObject Cache Settings
835+
//! \details Init MemoryObject Cache Settings in codechal hw interface
836+
//!
837+
//! \return MOS_STATUS
838+
//! MOS_STATUS_SUCCESS if success, else fail reason
839+
//!
840+
MOS_STATUS InitMemoryObjectCacheSettings();
841+
833842
//!
834843
//! \brief Init L3 Cache Settings
835844
//!

‎media_softlet/agnostic/common/codec/hal/shared/codec_hw_next.cpp‎

Lines changed: 63 additions & 31 deletions
Original file line numberDiff line numberDiff line change
@@ -73,6 +73,8 @@ CodechalHwInterfaceNext::CodechalHwInterfaceNext(
7373

7474
m_disableScalability = disableScalability;
7575
m_userSettingPtr = osInterface->pfnGetUserSettingInstance(osInterface);
76+
77+
InitMemoryObjectCacheSettings();
7678
}
7779

7880
CodechalHwInterfaceNext::~CodechalHwInterfaceNext()
@@ -179,6 +181,18 @@ MOS_STATUS CodechalHwInterfaceNext::InitCacheabilityControlSettings(
179181

180182
CODEC_HW_FUNCTION_ENTER;
181183

184+
CODEC_HW_CHK_STATUS_RETURN(InitMemoryObjectCacheSettings());
185+
CODEC_HW_CHK_STATUS_RETURN(InitL3CacheSettings());
186+
187+
return eStatus;
188+
}
189+
190+
MOS_STATUS CodechalHwInterfaceNext::InitMemoryObjectCacheSettings()
191+
{
192+
MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
193+
194+
CODEC_HW_FUNCTION_ENTER;
195+
182196
CODEC_HW_CHK_NULL_RETURN(m_osInterface);
183197

184198
for (uint32_t i = MOS_CODEC_RESOURCE_USAGE_BEGIN_CODEC + 1; i < MOS_CODEC_RESOURCE_USAGE_END_CODEC; i++)
@@ -189,22 +203,6 @@ MOS_STATUS CodechalHwInterfaceNext::InitCacheabilityControlSettings(
189203

190204
SetCacheabilitySettings(m_cacheabilitySettings);
191205

192-
bool l3CachingEnabled = !m_osInterface->bSimIsActive;
193-
194-
if (m_checkBankCount)
195-
{
196-
CODEC_HW_CHK_NULL_RETURN(m_osInterface);
197-
auto gtSysInfo = m_osInterface->pfnGetGtSystemInfo(m_osInterface);
198-
CODEC_HW_CHK_NULL_RETURN(gtSysInfo);
199-
200-
l3CachingEnabled = (gtSysInfo->L3BankCount != 0 || gtSysInfo->L3CacheSizeInKb != 0);
201-
}
202-
203-
if (l3CachingEnabled)
204-
{
205-
InitL3CacheSettings();
206-
}
207-
208206
return eStatus;
209207
}
210208

@@ -402,6 +400,11 @@ MOS_STATUS CodechalHwInterfaceNext::SetCacheabilitySettings(
402400
{
403401
CODEC_HW_CHK_STATUS_RETURN(m_vvcpItf->SetCacheabilitySettings(cacheabilitySettings));
404402
}
403+
if (m_hucItf)
404+
{
405+
CODEC_HW_CHK_STATUS_RETURN(m_hucItf->SetCacheabilitySettings(cacheabilitySettings));
406+
}
407+
405408

406409
return eStatus;
407410
}
@@ -1112,24 +1115,53 @@ MOS_STATUS CodechalHwInterfaceNext::InitL3CacheSettings()
11121115
{
11131116
CODEC_HW_FUNCTION_ENTER;
11141117

1115-
// Get default L3 cache settings
1116-
CODEC_HW_CHK_STATUS_RETURN(m_renderItf->EnableL3Caching(nullptr));
1118+
MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1119+
1120+
CODEC_HW_CHK_NULL_RETURN(m_osInterface);
1121+
1122+
for (uint32_t i = MOS_CODEC_RESOURCE_USAGE_BEGIN_CODEC + 1; i < MOS_CODEC_RESOURCE_USAGE_END_CODEC; i++)
1123+
{
1124+
CODEC_HW_CHK_STATUS_RETURN(CachePolicyGetMemoryObject(
1125+
(MOS_HW_RESOURCE_DEF)i));
1126+
}
1127+
1128+
SetCacheabilitySettings(m_cacheabilitySettings);
1129+
1130+
bool l3CachingEnabled = !m_osInterface->bSimIsActive;
1131+
1132+
if (m_checkBankCount)
1133+
{
1134+
CODEC_HW_CHK_NULL_RETURN(m_osInterface);
1135+
auto gtSysInfo = m_osInterface->pfnGetGtSystemInfo(m_osInterface);
1136+
CODEC_HW_CHK_NULL_RETURN(gtSysInfo);
1137+
1138+
l3CachingEnabled = (gtSysInfo->L3BankCount != 0 || gtSysInfo->L3CacheSizeInKb != 0);
1139+
}
1140+
1141+
if (l3CachingEnabled)
1142+
{
1143+
if (m_renderItf)
1144+
{
1145+
// Get default L3 cache settings
1146+
CODEC_HW_CHK_STATUS_RETURN(m_renderItf->EnableL3Caching(nullptr));
11171147

11181148
#if (_DEBUG || _RELEASE_INTERNAL)
1119-
// Override default L3 cache settings
1120-
auto l3CacheConfig =
1121-
m_renderItf->GetL3CacheConfig();
1122-
mhw::render::MHW_RENDER_ENGINE_L3_CACHE_SETTINGS l3Overrides = {};
1123-
l3Overrides.dwTcCntlReg =
1124-
static_cast<mhw::render::MHW_RENDER_ENGINE_L3_CACHE_CONFIG *>(l3CacheConfig)->dwL3CacheTcCntlReg_Setting;
1125-
l3Overrides.dwAllocReg =
1126-
static_cast<mhw::render::MHW_RENDER_ENGINE_L3_CACHE_CONFIG *>(l3CacheConfig)->dwL3CacheAllocReg_Setting;
1127-
CODEC_HW_CHK_STATUS_RETURN(InitL3ControlUserFeatureSettings(
1128-
l3CacheConfig,
1129-
&l3Overrides));
1130-
CODEC_HW_CHK_STATUS_RETURN(m_renderItf->EnableL3Caching(
1131-
&l3Overrides));
1149+
// Override default L3 cache settings
1150+
auto l3CacheConfig =
1151+
m_renderItf->GetL3CacheConfig();
1152+
mhw::render::MHW_RENDER_ENGINE_L3_CACHE_SETTINGS l3Overrides = {};
1153+
l3Overrides.dwTcCntlReg =
1154+
static_cast<mhw::render::MHW_RENDER_ENGINE_L3_CACHE_CONFIG *>(l3CacheConfig)->dwL3CacheTcCntlReg_Setting;
1155+
l3Overrides.dwAllocReg =
1156+
static_cast<mhw::render::MHW_RENDER_ENGINE_L3_CACHE_CONFIG *>(l3CacheConfig)->dwL3CacheAllocReg_Setting;
1157+
CODEC_HW_CHK_STATUS_RETURN(InitL3ControlUserFeatureSettings(
1158+
l3CacheConfig,
1159+
&l3Overrides));
1160+
CODEC_HW_CHK_STATUS_RETURN(m_renderItf->EnableL3Caching(
1161+
&l3Overrides));
11321162
#endif // (_DEBUG || _RELEASE_INTERNAL)
1163+
}
1164+
}
11331165

11341166
return MOS_STATUS_SUCCESS;
11351167
}

‎media_softlet/agnostic/common/codec/hal/shared/codec_hw_next.h‎

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -364,6 +364,16 @@ class CodechalHwInterfaceNext
364364
MOS_STATUS InitCacheabilityControlSettings(
365365
CODECHAL_FUNCTION codecFunction);
366366

367+
368+
//!
369+
//! \brief Init MemoryObject Cache Settings
370+
//! \details Init MemoryObject Cache Settings in codechal hw interface
371+
//!
372+
//! \return MOS_STATUS
373+
//! MOS_STATUS_SUCCESS if success, else fail reason
374+
//!
375+
MOS_STATUS InitMemoryObjectCacheSettings();
376+
367377
//!
368378
//! \brief Get memory object of GMM Cacheability control settings
369379
//! \details Internal function to get memory object of GMM Cacheability control settings

0 commit comments

Comments
 (0)