Add support for Hexagon HVX (#509)

* Add support for Hexagon HVX

Add vendor module and tests for Qualcomm Hexagon HVX (Hexagon Vector
eXtension) SIMD support. HVX provides wide vector operations in either
64-byte (512-bit) or 128-byte (1024-bit) mode.

Note: u8x128/i8x128 types are not included because portable-simd
currently limits lane count to 64 (bitmask operations use u64).
In 128-byte HVX mode, u8x64 maps to a half-vector (512-bit).

* fixup! Add support for Hexagon HVX

fixup! Add support for Hexagon HVX

Address reviewer feedback:
- Remove hexagon_hvx test file (existing tests suffice with -C flags)
- Move HvxVector imports into their respective cfg modules
- Change u8x128/i8x128 comment to FIXME for discoverability

Author: androm3da

crates/core_simd/src/lib.rs

@@ -29,6 +29,7 @@
     any(target_arch = "powerpc", target_arch = "powerpc64"),
     feature(stdarch_powerpc)
 )]
+#![cfg_attr(target_arch = "hexagon", feature(stdarch_hexagon))]
 #![warn(missing_docs, clippy::missing_inline_in_public_items)] // basically all items, really
 #![deny(
     unsafe_op_in_unsafe_fn,

crates/core_simd/src/vendor.rs

@@ -32,3 +32,6 @@ mod powerpc;
 
 #[cfg(target_arch = "loongarch64")]
 mod loongarch64;
+
+#[cfg(target_arch = "hexagon")]
+mod hexagon;

crates/core_simd/src/vendor/hexagon.rs

@@ -0,0 +1,40 @@
+//! Conversions to Hexagon HVX SIMD types.
+
+use crate::simd::*;
+
+// HVX 128-byte mode (1024-bit vectors)
+// Enable with: -C target-feature=+hvx-length128b
+#[cfg(target_feature = "hvx-length128b")]
+mod hvx_128b {
+    use super::*;
+    use core::arch::hexagon::v128::HvxVector;
+
+    // Full vectors (1024-bit) map to HvxVector
+    from_transmute! { unsafe u16x64 => HvxVector }
+    from_transmute! { unsafe i16x64 => HvxVector }
+    from_transmute! { unsafe u32x32 => HvxVector }
+    from_transmute! { unsafe i32x32 => HvxVector }
+    from_transmute! { unsafe u64x16 => HvxVector }
+    from_transmute! { unsafe i64x16 => HvxVector }
+
+    // FIXME: u8x128/i8x128 don't exist in portable-simd (max lane count is 64)
+    // u8x64/i8x64 are only 512-bit (half of HvxVector in 128B mode)
+}
+
+// HVX 64-byte mode (512-bit vectors)
+// Default when hvx-length128b is not specified
+#[cfg(not(target_feature = "hvx-length128b"))]
+mod hvx_64b {
+    use super::*;
+    use core::arch::hexagon::v64::HvxVector;
+
+    // Full vectors (512-bit) map to HvxVector
+    from_transmute! { unsafe u8x64 => HvxVector }
+    from_transmute! { unsafe i8x64 => HvxVector }
+    from_transmute! { unsafe u16x32 => HvxVector }
+    from_transmute! { unsafe i16x32 => HvxVector }
+    from_transmute! { unsafe u32x16 => HvxVector }
+    from_transmute! { unsafe i32x16 => HvxVector }
+    from_transmute! { unsafe u64x8 => HvxVector }
+    from_transmute! { unsafe i64x8 => HvxVector }
+}