Implement dynamic storage opcodes in the compiler

[ironcev]

Description

This PR is a step in implementing #7560. It adds compiler support for dynamic storage opcodes by:

• supporting all opcodes in asm blocks.
• adding IR instructions for all opcodes.

Note that the FuelVmInstruction::StatePreload IR instruction returns zero if the slot is not used, but also if it is used and contains zero-sized content. The reason is that zero-sized storage types, like, e.g. StorageVec, have special semantics in the storage API and the storage_api does not write zero-sized types into storage, nor reads them. Modeling the IR instruction this way preserves this semantics and allows for more efficient implementation that is actually needed in the API. (Returning both the length and the existence information would require a stack allocation and more gas expensive compilation for something that is actually not used.)

This API semantics might be changed to support zero-sized types like any other types. This would be a separate breaking change and a part of Configurable and composable storage RFC.

Meanwhile, if a distinction between unused and zero-sized used slot is needed while preloading, it can be achieved by using the SPLD opcode in asm block.

Checklist

• I have linked to any relevant issues.
• I have commented my code, particularly in hard-to-understand areas.
• I have updated the documentation where relevant (API docs, the reference, and the Sway book).
  • If my change requires substantial documentation changes, I have requested support from the DevRel team
• I have added tests that prove my fix is effective or that my feature works.
• I have added (or requested a maintainer to add) the necessary Breaking* or New Feature labels where relevant.
• I have done my best to ensure that my PR adheres to the Fuel Labs Code Review Standards.
• I have requested a review from the relevant team or maintainers.

[cursor]

PR Summary

High Risk
Touches core compiler IR/verification and ASM/codegen paths for storage access, so bugs could change contract state semantics or produce invalid bytecode. Adds multiple new opcodes with new pointer-type requirements and $err-based signaling, increasing integration surface across tooling and tests.

Overview
Adds full pipeline support for FuelVM dynamic storage operations by introducing new IR instructions (StateClearSlots, StateReadSlot, StateWriteSlot, StateUpdateSlot, StatePreload) and new ASM opcodes (sclr, srdd, srdi, swrd, swri, supd, supi, spld) with printing/parsing and allocation support.

Updates codegen (fuel_asm_builder) to emit the new VirtualOp variants, selecting immediate vs register forms for len where applicable, and adjusts IR verification/type rules (including new untyped-pointer checks and new error variants) plus purity/CEI effect analysis to classify the new storage reads/writes correctly.

Extends forc-debug variable decoding for the new instructions and adds/updates serialization and e2e VM tests to cover the new dynamic storage behaviors and purity diagnostics.

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[ironcev]

👍

[codspeed-hq]

Merging this PR will not alter performance

✅ 25 untouched benchmarks

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_{Comparing ironcev/dynamic-storage-add-opcodes (a871f09) with master (f9b8158)}

[cursor]

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