Currently, vhdl-syntax only parses correct VHDL files and produces tons of irrelevant errors for incorrect VHDL files.
The parser must be extended to enable error recovery; every other structure in the crate already allows this (and is actually build for this use-case)
Currently, vhdl-syntax only parses correct VHDL files and produces tons of irrelevant errors for incorrect VHDL files.
The parser must be extended to enable error recovery; every other structure in the crate already allows this (and is actually build for this use-case)