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fix RA6M4#3431

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cpq merged 1 commit intomasterfrom
renesas
Feb 6, 2026
Merged

fix RA6M4#3431
cpq merged 1 commit intomasterfrom
renesas

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@scaprile
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@scaprile scaprile commented Feb 5, 2026

The RA6 driver had an incorrect internal setting, so it was causing the phy code to catch the NXP settings.
NXP boards have the same PHY chip, but their MAC clocks the PHY at 50MHz
The EK-RA6M4 board has a 25MHz crystal and the PHY clocks the MAC.
The EK-RA8M1 board has a different PHY, and who clocks who is ambiguous, both PHY and MAC have an external clock. As the PHY does not require special settings, this change should be safe.

Please test:
EK-RA6M4
EK-RA8M1 (just in case)

Please remember to update Wizard code once this PR is merged.

@scaprile scaprile requested review from cpq and robertc2000 February 5, 2026 18:21
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Works on RA8! (though it appears the MAC clocks the PHY in the schematic)

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scaprile commented Feb 6, 2026

(though it appears the MAC clocks the PHY in the schematic)

To me, who clocks who is ambiguous, both PHY and MAC have an external clock. I don't see a REFCLK from the PHY going into the MAC, nor viceversa... If I had to take a side, as this is a PHY setting, probably I would agree with you. Hopefully we're not setting clocks on this PHY, and that is consistent with the generic PHY clocks MAC setting. Should've been a different MAC, maybe we'd need to introduce the config parameter into the driver data structure.
So far, it is simpler this way.

@cpq cpq merged commit 3170261 into master Feb 6, 2026
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@cpq cpq deleted the renesas branch February 6, 2026 15:36
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3 participants