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[LoongArch64] Place async resumption info in read-write section which reference #123433 #124213

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Merged
jakobbotsch merged 5 commits into from
Mar 11, 2026
Merged

[LoongArch64] Place async resumption info in read-write section which reference #123433 #124213

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4913f41
[LoongArch64] Place async resumption info in read-write section which…
shushanhf Feb 10, 2026
4e50db9
fix the confliction with `compDbgEnC` and sync with #125114.
shushanhf Mar 10, 2026
8822108
Merge branch 'main' into async_resumption_LA64
shushanhf Mar 10, 2026
84ac2ed
apply the format.patch.
shushanhf Mar 10, 2026
9e57b52
fix the conflicts with the #125114.
shushanhf Mar 10, 2026
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13 changes: 11 additions & 2 deletions src/coreclr/jit/codegenloongarch64.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -2279,7 +2279,7 @@ void CodeGen::genJumpTable(GenTree* treeNode)
// Access to inline data is 'abstracted' by a special type of static member
// (produced by eeFindJitDataOffs) which the emitter recognizes as being a reference
// to constant data, not a real static field.
GetEmitter()->emitIns_R_C(INS_bl, emitActualTypeSize(TYP_I_IMPL), treeNode->GetRegNum(), REG_NA,
GetEmitter()->emitIns_R_C(INS_bl, EA_PTRSIZE, treeNode->GetRegNum(), REG_NA,
m_compiler->eeFindJitDataOffs(jmpTabBase), 0);
genProduceReg(treeNode);
}
Expand All @@ -2292,7 +2292,16 @@ void CodeGen::genJumpTable(GenTree* treeNode)
//
void CodeGen::genAsyncResumeInfo(GenTreeVal* treeNode)
{
GetEmitter()->emitIns_R_C(INS_bl, emitActualTypeSize(TYP_I_IMPL), treeNode->GetRegNum(), REG_NA,
// INS_bl/b are placeholders that is not the final instruction.
instruction ins = INS_bl;
emitAttr attr = EA_PTRSIZE;
if (m_compiler->eeDataWithCodePointersNeedsRelocs())
{
ins = INS_b;
attr = EA_SET_FLG(EA_PTRSIZE, EA_CNS_RELOC_FLG);
}

GetEmitter()->emitIns_R_C(ins, attr, treeNode->GetRegNum(), REG_NA,
genEmitAsyncResumeInfo((unsigned)treeNode->gtVal1), 0);
genProduceReg(treeNode);
}
Expand Down
31 changes: 24 additions & 7 deletions src/coreclr/jit/emitloongarch64.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -1972,8 +1972,8 @@ void emitter::emitIns_R_R_R_R(
/*****************************************************************************
*
* Add an instruction with a register + static member operands.
* Constant is stored into JIT data which is adjacent to code.
* For LOONGARCH64, maybe not the best, here just supports the func-interface.
* Usually constants are stored into JIT data adjacent to code, in which case no
* relocation is needed. PC-relative offset will be encoded directly into instruction.
*
*/
void emitter::emitIns_R_C(
Expand All @@ -1982,10 +1982,13 @@ void emitter::emitIns_R_C(
assert(offs >= 0);
assert(instrDesc::fitsInSmallCns(offs)); // can optimize.

// when id->idIns == bl, for reloc! 4-ins.
// when id->idIns == b, for AsyncResumeInfo reloc.
// pcalau12i reg, off-hi-20bits
// addi_d reg, offs_lo-12bits(reg)
// when id->idIns == bl, for reloc! 2-ins.
// pcaddu12i reg, off-hi-20bits
// addi_d reg, reg, off-lo-12bits
// when id->idIns == load-ins, for reloc! 4-ins.
// when id->idIns == load-ins, for reloc! 2-ins.
// pcaddu12i reg, off-hi-20bits
// load reg, offs_lo-12bits(reg)
//
Expand All @@ -2000,14 +2003,15 @@ void emitter::emitIns_R_C(
// load reg, r21 + addr_bits[11:0]

instrDesc* id = emitNewInstr(attr);
id->idSetRelocFlags(attr);

id->idIns(ins);
assert(reg != REG_R0); // for special. reg Must not be R0.
id->idReg1(reg); // destination register that will get the constant value.

id->idSmallCns(offs); // usually is 0.
id->idInsOpt(INS_OPTS_RC);
if (m_compiler->opts.compReloc)
if (m_compiler->opts.compReloc || id->idIsReloc())
{
id->idSetIsDspReloc();
id->idCodeSize(8);
Expand All @@ -2030,7 +2034,6 @@ void emitter::emitIns_R_C(
id->idOpSize(EA_PTRSIZE);
}

// TODO-LoongArch64: this maybe deleted.
id->idSetIsBound(); // We won't patch address since we will know the exact distance
// once JIT code and data are allocated together.

Expand Down Expand Up @@ -3376,6 +3379,9 @@ size_t emitter::emitOutputInstr(insGroup* ig, instrDesc* id, BYTE** dp)
{
// Reference to JIT data

// when id->idIns == b, for AsyncResumeInfo reloc.
// pcalau12i reg, off-hi-20bits
// addi_d reg, offs_lo-12bits(reg)
// when id->idIns == bl, for reloc!
// pcaddu12i r21, off-hi-20bits
// addi_d reg, r21, off-lo-12bits
Expand Down Expand Up @@ -3408,7 +3414,18 @@ size_t emitter::emitOutputInstr(insGroup* ig, instrDesc* id, BYTE** dp)
ins = id->idIns();
regNumber reg1 = id->idReg1();

if (id->idIsReloc())
if (ins == INS_b)
{
// relocation for AsyncResumeInfo.
*(code_t*)dstRW = 0x1a000000 | (code_t)reg1;
dstRW += 4;
ins = INS_addi_d;
*(code_t*)dstRW = 0x02c00000 | (code_t)reg1 | (code_t)(reg1 << 5);
dstRW += 4;
emitRecordRelocation(dstRW - 8 - writeableOffset, emitDataOffsetToPtr(dataOffs),
CorInfoReloc::LOONGARCH64_PC);
}
else if (id->idIsReloc())
{
// get the addr-offset of the data.
imm = (ssize_t)emitDataOffsetToPtr(dataOffs) - (ssize_t)(dstRW - writeableOffset);
Expand Down
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