[uart] Fiberize UART implementations

src/modm/platform/uart/at90_tiny_mega/module.lb

@@ -42,7 +42,6 @@ class Instance(Module):
         module.description = "Instance {}".format(self.instance)
 
     def prepare(self, module, options):
-        module.depends(":platform:uart")
         load_options(module)
         return True
 
@@ -77,6 +76,7 @@ def prepare(module, options):
         ":architecture:atomic",
         ":architecture:interrupt",
         ":architecture:uart",
+        ":architecture:fiber",
         ":math:algorithm",
         ":platform:gpio")
 

src/modm/platform/uart/at90_tiny_mega/uart_tx.cpp.in

@@ -24,6 +24,7 @@
 #include <modm/architecture/driver/atomic/queue.hpp>
 #include <modm/architecture/interface/atomic_lock.hpp>
 #include <modm/architecture/interface/interrupt.hpp>
+#include <modm/processing/fiber.hpp>
 
 #include "uart_defines.h"
 
@@ -50,12 +51,7 @@ void
 modm::platform::Uart{{ id }}::writeBlocking(uint8_t data)
 {
 	// wait until there is some place in the buffer
-	while (!write(data))
-		;
-
-	// wait until everything has been sent
-	while (!isWriteFinished())
-		;
+	modm::this_fiber::poll([&]{ return write(data); });
 }
 
 void
@@ -67,18 +63,13 @@ modm::platform::Uart{{ id }}::writeBlocking(const uint8_t *data, std::size_t len
 		while (!write(*data++))
 			;
 	}
-
-	// then wait
-	while (!isWriteFinished())
-		;
 }
 
 void
 modm::platform::Uart{{ id }}::flushWriteBuffer()
 {
 	// just wait until the last byte has been sent
-	while (!isWriteFinished())
-		;
+	modm::this_fiber::poll([&]{ return isWriteFinished(); });
 }
 
 // MARK: - write

src/modm/platform/uart/cortex/itm.cpp.in

@@ -10,6 +10,7 @@
 // ----------------------------------------------------------------------------
 
 #include <modm/platform/device.hpp>
+#include <modm/processing/fiber.hpp>
 #include "itm.hpp"
 
 %% if options["buffer.tx"]
@@ -74,14 +75,18 @@ Itm::enable(uint8_t prescaler)
 void
 Itm::writeBlocking(uint8_t data)
 {
-	while(not write(data)) ;
+	modm::this_fiber::poll([&]{ return write(data); });
 }
 
 void
 Itm::flushWriteBuffer()
 {
 %% if options["buffer.tx"]
-	while(!isWriteFinished()) update();
+	while(!isWriteFinished())
+	{
+		update();
+		modm::this_fiber::yield();
+	}
 %% else
 	return;
 %% endif
@@ -91,6 +96,7 @@ bool
 Itm::write(uint8_t data)
 {
 %% if options["buffer.tx"]
+	update();
 	if (txBuffer.push(data)) return true;
 	update();
 	return txBuffer.push(data);
@@ -109,16 +115,6 @@ Itm::write(const uint8_t *data, std::size_t length)
 	return sent;
 }
 
-bool
-Itm::isWriteFinished()
-{
-%% if options["buffer.tx"]
-	return txBuffer.isEmpty();
-%% else
-	return true;
-%% endif
-}
-
 std::size_t
 Itm::discardTransmitBuffer()
 {
@@ -138,6 +134,16 @@ Itm::discardTransmitBuffer()
 #undef PORT
 %% endif
 
+bool
+Itm::isWriteFinished()
+{
+%% if options["buffer.tx"]
+	return txBuffer.isEmpty() and ITM->PORT[0].u32 != 0;
+%% else
+	return ITM->PORT[0].u32 != 0;
+%% endif
+}
+
 bool
 Itm::write_itm(uint32_t data, uint8_t size)
 {

src/modm/platform/uart/cortex/module.lb

@@ -23,6 +23,7 @@ def prepare(module, options):
 
     module.depends(
         ":architecture:uart",
+        ":architecture:fiber",
         ":cmsis:device")
 
     module.add_option(

src/modm/platform/uart/rp/module.lb

@@ -61,6 +61,7 @@ def prepare(module, options):
         ":platform:gpio",
         ":platform:clockgen",
         ":architecture:uart",
+        ":architecture:fiber",
         ":architecture:interrupt")
 
     for instance in listify(device.get_driver("uart")["instance"]):

src/modm/platform/uart/rp/uart.cpp.in

@@ -17,6 +17,7 @@
 #include <modm/architecture/interface/atomic_lock.hpp>
 #include <modm/architecture/interface/interrupt.hpp>
 #include <modm/platform/core/resets.hpp>
+#include <modm/processing/fiber.hpp>
 
 #include "../device.hpp"
 
@@ -60,7 +61,7 @@ void modm::platform::Uart{{ id }}::unreset()
 void
 modm::platform::Uart{{ id }}::writeBlocking(uint8_t data)
 {
-	while (not write(data));
+	modm::this_fiber::poll([&]{ return write(data); });
 }
 
 void
@@ -72,7 +73,7 @@ modm::platform::Uart{{ id }}::writeBlocking(const uint8_t *data, std::size_t len
 void
 modm::platform::Uart{{ id }}::flushWriteBuffer()
 {
-	while(!isWriteFinished());
+	modm::this_fiber::poll([&]{ return isWriteFinished(); });
 }
 
 // ----------------------------------------------------------------------------

src/modm/platform/uart/sam-sercom/module.lb

@@ -50,6 +50,7 @@ def prepare(module, options):
 
     module.depends(
         ":architecture:uart",
+        ":architecture:fiber",
         ":math:algorithm",
         ":cmsis:device",
         ":platform:gpio",

src/modm/platform/uart/sam-sercom/uart.cpp.in

@@ -15,14 +15,15 @@
 #include "../device.hpp"
 #include "uart_hal_{{ id }}.hpp"
 #include "uart_{{ id }}.hpp"
+#include <modm/processing/fiber.hpp>
 
 namespace modm::platform
 {
 
 void
 {{ name }}::writeBlocking(uint8_t data)
 {
-	while(!{{ hal }}::isTransmitRegisterEmpty());
+	modm::this_fiber::poll([&]{ return {{ hal }}::isTransmitRegisterEmpty(); });
 	{{ hal }}::write(data);
 }
 
@@ -37,7 +38,7 @@ void
 void
 {{ name }}::flushWriteBuffer()
 {
-	return;
+	modm::this_fiber::poll([&]{ return isWriteFinished(); });
 }
 
 bool

src/modm/platform/uart/sam/uart.cpp.in

@@ -13,6 +13,7 @@
 #include "{{ type }}_{{ id }}.hpp"
 
 #include <modm/architecture/driver/atomic/queue.hpp>
+#include <modm/processing/fiber.hpp>
 
 %% set name="{}{}".format(type.capitalize(), id)
 %% set reg=name.upper()
@@ -111,7 +112,7 @@ bool
 void
 {{ name }}::flushWriteBuffer()
 {
-	while(!isWriteFinished());
+	modm::this_fiber::poll([&]{ return isWriteFinished(); });
 }
 
 void

src/modm/platform/uart/sam/uart/module.lb

@@ -69,6 +69,7 @@ def prepare(module, options):
 
     module.depends(
         ":architecture:uart",
+        ":architecture:fiber",
         ":math:algorithm",
         ":cmsis:device",
         ":platform:gpio",

src/modm/platform/uart/sam/usart/module.lb

@@ -70,6 +70,7 @@ def prepare(module, options):
 
     module.depends(
         ":architecture:uart",
+        ":architecture:fiber",
         ":math:algorithm",
         ":cmsis:device",
         ":platform:gpio",

src/modm/platform/uart/stm32/module.lb

@@ -48,7 +48,6 @@ class Instance(Module):
     def prepare(self, module, options):
         module.add_alias(Alias(name="buffer.tx", description=descr_buffer))
         module.add_alias(Alias(name="buffer.rx", description=descr_buffer))
-        module.depends(":platform:uart")
         return True
 
     def build(self, env):
@@ -105,6 +104,7 @@ def prepare(module, options):
         ":architecture:interrupt",
         ":architecture:register",
         ":architecture:uart",
+        ":architecture:fiber",
         ":math:algorithm",
         ":cmsis:device",
         ":platform:gpio",

src/modm/platform/uart/stm32/uart.hpp

@@ -21,6 +21,7 @@
 #include <modm/architecture/interface/uart.hpp>
 #include <modm/platform/gpio/connector.hpp>
 #include <modm/architecture/interface/atomic_lock.hpp>
+#include <modm/processing/fiber.hpp>
 #include "uart_base.hpp"
 
 namespace modm::platform
@@ -73,7 +74,7 @@ struct BufferedUart : public UartBase, public ::modm::Uart
 	static void
 	writeBlocking(uint8_t data)
 	{
-		while(!Hal::isTransmitRegisterEmpty());
+		modm::this_fiber::poll([&]{ return Hal::isTransmitRegisterEmpty(); });
 		Hal::write(data);
 	}
 
@@ -86,7 +87,10 @@ struct BufferedUart : public UartBase, public ::modm::Uart
 	}
 
 	static void
-	flushWriteBuffer() { while(!isWriteFinished()); }
+	flushWriteBuffer()
+	{
+		modm::this_fiber::poll([&]{ return isWriteFinished(); });
+	}
 
 	static bool
 	write(uint8_t data)

src/modm/platform/uart/stm32/uart_buffer.hpp

@@ -110,7 +110,7 @@ class BufferedUart<Hal, UartTxBuffer<SIZE>, Buffers...>: public BufferedUart<Hal
 	}
 
 	static void
-	flushWriteBuffer() { while(not isWriteFinished()); }
+	flushWriteBuffer() { modm::this_fiber::poll([&]{ return isWriteFinished(); }); }
 
 	static bool
 	isWriteFinished() { return txBuffer.isEmpty() and Hal::isTransmitRegisterEmpty(); }