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Description
Background Work
- Yes, I searched the mailing list
- Yes, I searched prior issues
- Yes, I searched the documentation
Chipyard Version and Hash
Release: 1.5.0
Hash: a6a6a6
OS Setup
not relevant
Other Setup
also not relevant
Current Behavior
it seem like the FIRRTL has been depricated and moved to circ (MLIR)
but the chipyard documentation has not been updated + all links to FIRRTL are dead.
This makes some things rather confusing.
Trying to build a custom fpga - trying to figure out how to generate code that has inline memory definitions so that Vivado can infer memories. seems completely undocumented anywhere.
but as far as I can tell with the circ flow these are now in a file called something like TestHarness..top.mems.v
which seem like a terrible name for something you want to include in a synthesis.
so maybe this should be named differently ?
in advance I apologize if I have missed something or misunderstood somethign!
Expected Behavior
Links in the documentation does not work
updated documentation
Other Information
No response