Add support for TI TMS570LC43 SoC by ntavish · Pull Request #88741 · zephyrproject-rtos/zephyr

ntavish · 2025-04-17T04:25:47Z

The SoC has a Cortex-R5 CPU, it required big-endian and BE32 compiler flags. I enabled big-endian ARMv7-R in the SDK toolchain here, and maybe only this CPU uses it as of now: zephyrproject-rtos/sdk-ng#765

I only have (and plan to use) only this specific SoC (TMS570LC43xx), so I focus on getting this chip working, but variants should be able to utilize this code mostly as is (AFAIK).

There is some code in the soc directory (soc.c, asm_funcs.S, soc_pll_errata.c) that is adapted from "TI Halcogen" generated code. It was license BSD 3-clause, and I am checking with TI support if they could help re-licensing it, so I did not create an RFC for the board related to that yet. I did not want to add this to the HAL module, as I am exporting only very limited portions of what the Halcogen generates, but open to suggestions.

nordicjm · 2025-04-17T09:09:33Z

arch/arm/core/Kconfig

+config PLATFORM_SPECIFIC_PRE_STACK_INIT
+	bool "Platform (SOC) specific startup hook executed before the stack is initialised"
+	help
+	  The platform specific initialization code (z_arm_platform_pre_stack_init) is
+	  executed in the early startup code right after the registers are set to known
+	  values and before stack is set up. Note that this code cannot use the stack unlike
+	  z_arm_platform_init.


@nashif for review

decided to not include this commit, soc_reset_hook is sufficient with a small fix before jumping to z_prep_c.

nordicjm · 2025-04-17T09:10:00Z

dts/arm/ti/tms570.dtsi

+	clocks {
+		/*
+		* OSC_IN (16 MHZ)
+		*  -> PLL1 (300 MHz)
+		*      -> GCLK1 (300 MHz)
+		*          -> HCLK (150 MHz)
+		*              -> VCLK (75 MHz)
+		*                  -> RTICLK (75 MHz, divider is bypassed when VCLK is the source)
+		*/
+	};


why is this an empty section with no nodes?

@nordicjm thak you for the review, I have fixed the PR based on your comments. Sorry it was still in draft, I was rebasing and refactoring some code still from an older branch. I will still keep it in draft for today, while I add some description, and also try to figure out what to do with the BSD 3-clause code from TI.

I squashed some commits and this comment block is left as is for reference, however, the section is no longer empty.

nordicjm · 2025-04-17T09:10:34Z

soc/ti/hercules/Kconfig.soc

+	bool
+
+config SOC_FAMILY
+	default "ti_hercules" if SOC_FAMILY_HERCULES


names must match either: default "hercules" if SOC_FAMILY_HERCULES or default "ti_hercules" if SOC_FAMILY_TI_HERCULES, soc.yml must also match

nordicjm · 2025-04-17T09:27:08Z

soc/ti/hercules/tms570lc43x/CMakeLists.txt

+# TMS470 requires the ARM "legacy Word Invariant Addressing big-endian mode"
+zephyr_compile_options(
+  -mbe32
+  ${TOOLCHAIN_C_FLAGS}
+)
+
+zephyr_ld_options(
+  -mbe32
+  ${TOOLCHAIN_LD_FLAGS}
+)


@tejlmand for comment

nordicjm · 2025-04-17T09:27:26Z

soc/ti/hercules/tms570lc43x/Kconfig.defconfig

+
+# launchpad is 16MHz
+config SYS_CLOCK_HW_CYCLES_PER_SEC
+	default 16000000


needs to come from dts property

Fixed the comment and value, but kept it in Kconfig.defconfig as several other SoCs seem to have it too.

nordicjm · 2025-04-17T09:29:32Z

boards/ti/tms570_launchxl2/tms570_launchxl2_defconfig

+# SPDX-License-Identifier: Apache-2.0
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_TI_TMS570=y


nordicjm · 2025-04-17T09:30:00Z

drivers/interrupt_controller/Kconfig.tms570_vim

+	default y
+	depends on DT_HAS_TI_TMS570_VIM_ENABLED
+	help
+		The TI Vectored Interrupt Manager provides hardware assistance for prioritizing


help indent is 1x tab followed by 2x spaces

nordicjm · 2025-04-17T09:30:26Z

drivers/interrupt_controller/Kconfig.tms570_vim

+if CPU_CORTEX_R5
+
+config TMS570_VIM


how does this relate to cortex r5 if it's a ti specific thing?

nordicjm · 2025-04-17T09:30:39Z

dts/arm/ti/tms570.dtsi

-		
+


fix in original commit

fixed, I think

nordicjm · 2025-04-17T09:31:10Z

soc/ti/hercules/tms570lc43x/Kconfig.defconfig

 config FLASH_BASE_ADDRESS
-	default 1000000
+	default 0x00000000


fix in original commit

sonarqubecloud · 2025-07-03T07:39:31Z

Quality Gate passed

Issues
5 New issues
0 Accepted issues

Measures
0 Security Hotspots
0.0% Coverage on New Code
0.0% Duplication on New Code

See analysis details on SonarQube Cloud

nordicjm · 2025-07-16T11:24:52Z

soc/ti/hercules/ti_tms570lc43x/Kconfig.defconfig

 config MULTITHREADING
+	default y
+


Suggested change

config MULTITHREADING

default y

arm arch specific changes were removed so removing my -1

kartben · 2025-08-14T16:34:35Z

boards/ti/tms570_launchxl2/doc/index.rst

+
+-----------+------------+--------------------------------------+
+| Interface | Controller | Driver/Component                     |
+===========+============+======================================+
+| VIM       | on-chip    | Vectored interrupt manager           |
+-----------+------------+--------------------------------------+
+| SCI       | on-chip    | Serial communication interface       |
+-----------+------------+--------------------------------------+
+| IOMM      | on-chip    | Pin multiplexing                     |
+---------------------------------------------------------------+
+| GIO       | on-chip    | General purpose input / output       |
+-----------+------------+--------------------------------------+
+| RTI       | on-chip    | Real-time interrupt                  |
+-----------+------------+--------------------------------------+


boards/ti/tms570_launchxl2/doc/index.rst

kartben · 2025-08-14T16:36:24Z

boards/ti/tms570_launchxl2/board.yml

@@ -0,0 +1,5 @@
+board:
+  name: tms570_launchxl2


Suggested change

name: tms570_launchxl2

name: tms570_launchxl2

full_name: Hercules TMS570LC43x LaunchPad

Adds new SoC. Some of the necessary startup code is based on the vendor provides tool (halcogen) and it includes SoC init and some errata handling. That code originally had BSD-3-clause license, so it cannot be part of this commit, and has been moved to TI hal repository (modules/hal/ti). The Halcogen code was mostly adapted to zephyr coding style and the the dependencies were minimized. As for erratas, the included one right now is PLL startup problem errata. We also have CORTEX-R5#7 (ARM ID-780125), but it was not included because: 1. Halcogen code does not implement it 3. This is Cortex R5 errata, Xilinx R5 implementation has this note https://adaptivesupport.amd.com/s/article/65878 Signed-off-by: Tavish Naruka <t-naruka@ispace-inc.com>

Adds driver for TI TMS570 SoC. Signed-off-by: Tavish Naruka <t-naruka@ispace-inc.com>

Adds SCI peripheral UART driver for TMS570. Signed-off-by: Tavish Naruka <t-naruka@ispace-inc.com>

Add TI VIM driver specific to the TMS570 chips. This driver/peripheral is not compatible with the existing intc_vim.c for some other TI chips. Signed-off-by: Tavish Naruka <t-naruka@ispace-inc.com>

Adds the RTI timer for TI TMS570 SoC and enables it as the system timer for enabling multithreading. Signed-off-by: Tavish Naruka <t-naruka@ispace-inc.com>

Adds TI TMS570 SoC GPIO driver. Signed-off-by: Tavish Naruka <t-naruka@ispace-inc.com>

Adds minimal config for TI TMS570 launchpad which has the TMS570LC43 SoC. Signed-off-by: Tavish Naruka <t-naruka@ispace-inc.com>

Adds basic information about the board about supported peripherals. Signed-off-by: Tavish Naruka <t-naruka@ispace-inc.com>

ntavish · 2025-09-01T15:28:08Z

Sorry, one (hopefully final) code push here to move back one of the header files (Apache 2.0 licensed) back to zephyr soc directory from the hal_ti module which did not really need those. Now both soc_defaults.h soc_internal.h are included in soc directory (same as before I moved some code to hal_ti)

kartben

+1 for docs, thanks

sonarqubecloud · 2025-09-01T15:48:10Z

Quality Gate passed

Issues
1 New issue
0 Accepted issues

Measures
0 Security Hotspots
0.0% Coverage on New Code
0.0% Duplication on New Code

See analysis details on SonarQube Cloud

nordicjm · 2025-09-02T06:19:26Z

soc/ti/hercules/ti_tms570lc43x/soc_internal.h

+	SW_RESET		= 0x0010U,  /**< Alias for Software Reset     */
+	EXT_RESET		= 0x0008U,  /**< Alias for External Reset     */
+	NO_RESET		= 0x0000U   /**< Alias for No Reset           */
+} resetSource_t;


needs to be snake case not camel case

nordicjm · 2025-09-02T06:19:50Z

soc/ti/hercules/ti_tms570lc43x/soc_internal.h

+void _mpuInit_(void);
+uint32_t _errata_SSWF021_45_both_plls(uint32_t count);


github-actions · 2025-11-02T00:41:51Z

This pull request has been marked as stale because it has been open (more than) 60 days with no activity. Remove the stale label or add a comment saying that you would like to have the label removed otherwise this pull request will automatically be closed in 14 days. Note, that you can always re-open a closed pull request at any time.

sgilbert182 · 2026-03-22T21:37:56Z

Hi ntavish,

I’ve been testing this branch locally and found a missing soc.c integration causing a link failure (soc_reset_hook). Adding zephyr_sources(soc.c) and a minimal stub resolves the build.

Happy to open a PR or share a patch if useful.

ntavish · 2026-03-25T14:33:30Z

Hello @sgilbert182 I haven't updated this PR in a while. A fix is not necessary at this point, I don't plan to work further on this PR in the near future. But I do hope to pick it up again at some point of time.

The halcogen code doesn't seem to be getting merged, but I have gotten rid of much of the BSD license code, and have created more peripheral drivers. The biggest remaining piece is the Cortex-R5 MPU code, which currently is assembly exported from the halcogen GUI, but as I understand it should be compatible with standard Cortex-R MPU and cane be written in C using zephyr MPU APIs. Once I sort that out, I'll rebase to latest zephyr and update this PR (no hal-ti branch code).

sgilbert182 · 2026-03-25T17:54:05Z

Thanks for getting back to me, it sounds like you have a plan! Let me know if there's anything I can do to help, otherwise I look forward to seeing your updated PR

nordicjm requested changes Apr 17, 2025

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ntavish force-pushed the feature/add-tms570lc43 branch from 6fb7d8e to 338a715 Compare April 24, 2025 04:45

ntavish changed the title ~~Feature/add tms570lc43~~ Add support for TI TMS570LC43 SoC Apr 24, 2025

ntavish force-pushed the feature/add-tms570lc43 branch 6 times, most recently from c5325f3 to cc4599b Compare April 24, 2025 12:23

ntavish marked this pull request as ready for review April 25, 2025 04:02

github-actions bot added area: Testsuite Testsuite area: Pinctrl area: UART Universal Asynchronous Receiver-Transmitter area: GPIO platform: TI SimpleLink Texas Instruments SimpleLink MCU area: Interrupt Controller area: Timer Timer area: ARM ARM (32-bit) Architecture labels Apr 25, 2025

github-actions bot requested review from MaureenHelm, andyross, carlocaione, dcpleung, galak, gmarull, henrikbrixandersen, microbuilder, mnkp, teburd, vaishnavachath and vanti April 25, 2025 04:03

ntavish requested a review from nordicjm June 28, 2025 15:56

ntavish force-pushed the feature/add-tms570lc43 branch from 5aaadbf to 5c9e447 Compare July 3, 2025 07:12

nordicjm requested changes Jul 16, 2025

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kartben requested changes Aug 14, 2025

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ntavish force-pushed the feature/add-tms570lc43 branch from 5c9e447 to 5d2a1df Compare August 18, 2025 04:23

ntavish requested review from kartben and nordicjm August 18, 2025 10:28

nordicjm previously approved these changes Sep 1, 2025

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Tavish Naruka added 8 commits September 1, 2025 23:29

drivers: pinctrl: add tms570 driver

caf5c0b

Adds driver for TI TMS570 SoC. Signed-off-by: Tavish Naruka <t-naruka@ispace-inc.com>

drivers: serial: add tms570 uart driver

1548b06

Adds SCI peripheral UART driver for TMS570. Signed-off-by: Tavish Naruka <t-naruka@ispace-inc.com>

drivers: intc: add vim_tms570 interrupt controller

18cad3c

Add TI VIM driver specific to the TMS570 chips. This driver/peripheral is not compatible with the existing intc_vim.c for some other TI chips. Signed-off-by: Tavish Naruka <t-naruka@ispace-inc.com>

drivers: timer: add TMS570 RTI timer as system timer

eb39308

Adds the RTI timer for TI TMS570 SoC and enables it as the system timer for enabling multithreading. Signed-off-by: Tavish Naruka <t-naruka@ispace-inc.com>

drivers: gpio: add TMS570 gpio driver

9f417c3

Adds TI TMS570 SoC GPIO driver. Signed-off-by: Tavish Naruka <t-naruka@ispace-inc.com>

boards: ti: tms570_launchxl2: add new board

ae25f5a

Adds minimal config for TI TMS570 launchpad which has the TMS570LC43 SoC. Signed-off-by: Tavish Naruka <t-naruka@ispace-inc.com>

doc: boards: add tms570_launchxl2 board documentation

3a31b70

Adds basic information about the board about supported peripherals. Signed-off-by: Tavish Naruka <t-naruka@ispace-inc.com>

ntavish dismissed nordicjm’s stale review via 3a31b70 September 1, 2025 15:23

ntavish force-pushed the feature/add-tms570lc43 branch from 5d2a1df to 3a31b70 Compare September 1, 2025 15:23

kartben approved these changes Sep 1, 2025

View reviewed changes

nordicjm requested changes Sep 2, 2025

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github-actions bot added the Stale label Nov 2, 2025

github-actions bot closed this Nov 16, 2025

	name: tms570_launchxl2
	name: tms570_launchxl2
	full_name: Hercules TMS570LC43x LaunchPad

		void _mpuInit_(void);
		uint32_t _errata_SSWF021_45_both_plls(uint32_t count);

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