CAN REV-A Firmware

[psinha25]

This PR is to merge the CAN REV-A board's IP and firmware into develop. This PR contains the necessary IP block and user application firmware to drive the CAN expansion board. Specifically, it contains:

• Wrapper functions around the low-level register manipulation drivers to abstract the low-level details away and provide a clean/easy to use API for the user. The wrapper functions can be found at sdk/bare/common/drv/can.h.
• A user app to interact with the CAN peripheral from the command line. The sole purpose of this app is to provide an example of HOW to use the wrapper functions. In reality, users will make calls to the wrapper functions. The code for this user app can be found at sdk/bare/common/usr/can/cmd/cmd_can.c and sdk/bare/common/usr/can/task_can.c.

Originally, a Xilinx provided CAN IP block was going to be used. Due to licensing issues, a bitstream couldn't be generated with this IP block. Thus, given that there are two CAN peripherals baked into the silicon of the Zync-7000 SoC, these peripherals are used and routed to the GPIO expansion ports via EMIO.

Documentation about the CAN drivers can be found here.

[npetersen2]

Comments on the drv/can.h and drv/can.c files

Configuration:

• Add usr/user_config.h symbol to enable/disable CAN support (separate from CAN_APP)
• [optional] pass in CAN device ID to driver functions instead of storing state inside your driver
• BTR function call API -- first time, second time => rename to match reference manual
• BTR function call -- make user pass in default defines instead of 0's
• BRPR API call -- assume valid input, not 0's for default
• Move default defines to header for API calls
• Add enum which matches CAN state from Xilinx header file. User should pass in this enum to configure CAN peripheral state

Compilation Config:

• Add #ifdefs for turning off printfs in driver

Packet Tx:
(assuming only support standard IDs, not extended)

• User needs to specify custom message ID per CAN packet (not hardcoded) -- add as first parameter to API call

Packet Rx:

• Add ability to get data OUT of the rx API call, not just print to screen
• ==> have user pass in can_packet_t struct pointer and then populate it
• ==> include fields: message ID, message length (DLC), and message payload (8 byte array)

[psinha25]

@npetersen2

All the changes you've requested have been made. Please look to can.c and can.h. Furthermore, please take a look at the default values for the baud rate and the bit timing register bits in can.h. Currently, these defaults are not what we are wanting. I am struggling to understand what the defaults should be. Any suggestions?

[npetersen2]

@psinha25 thanks for making the changes -- looking good!

For the CAN bit timings, see this helpful website: http://www.bittiming.can-wiki.info/
Let's make the default bit rate be 500kbps and adhere to CANOpen specs.

[psinha25]

@npetersen2 I've updated the default values in can.h for the Bit Timing Register (BTR) and the Baud Rate Prescalar Register (BRPR) to have a default bit rate of 500kbps assuming a 200 MHz clock while adhering to the CANOpen specs. Furthermore, I've formatted the code to pass the linter. Please take a look and let me know if there are any other changes to make? Otherwise, I believe this is ready to merge.

[npetersen2]

@psinha25 can you confirm the CAN peripheral can operate at 200MHz clock? If I recall, it was limited to the 10s of MHz nominally.

[psinha25]

@npetersen2 Does the AMDC not operate at a 200 MHz clock? Given that, the baud rate prescalar and bit timing register are set with the specific defaults to create 500 kbps.

[npetersen2]

Correct, the main FPGA clock domain is 200Mhz, however, I believe there is a separate clock which runs the CAN peripheral

…

________________________________ From: Prasoon Sinha ***@***.***> Sent: Thursday, April 29, 2021 10:16:59 PM To: Severson-Group/AMDC-Firmware ***@***.***> Cc: Nathan Petersen ***@***.***>; Mention ***@***.***> Subject: Re: [Severson-Group/AMDC-Firmware] CAN REV-A Firmware (#193) @npetersen2<https://github.com/npetersen2> Does the AMDC not operate at a 200 MHz clock? Given that, the baud rate prescalar and bit timing register are set with the specific defaults to create 500 kbps. — You are receiving this because you were mentioned. Reply to this email directly, view it on GitHub<#193 (comment)>, or unsubscribe<https://github.com/notifications/unsubscribe-auth/AEZ4CHQ5APAF4X4GJFECYATTLIOKXANCNFSM43R4ESLQ>.

[psinha25]

@npetersen2 Ah interesting. I read through the clock section for the CAN peripheral in the Zynq-7000 Reference Manual and understand what you are saying now. I've updated the defaults in can.h. Please take a look and also read the comments. There I specify why the value are the way they are.

[npetersen2]

@psinha25 great, thanks for the updates